xref: /rk3399_ARM-atf/bl1/bl1_main.c (revision a1032beb656d78d1cffc97fa64c961d098b23b48)
1 /*
2  * Copyright (c) 2013-2025, Arm Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <assert.h>
8 
9 #include <platform_def.h>
10 
11 #include <arch.h>
12 #include <arch_features.h>
13 #include <arch_helpers.h>
14 #include <bl1/bl1.h>
15 #include <common/bl_common.h>
16 #include <common/build_message.h>
17 #include <common/debug.h>
18 #include <drivers/auth/auth_mod.h>
19 #include <drivers/auth/crypto_mod.h>
20 #include <drivers/console.h>
21 #include <lib/bootmarker_capture.h>
22 #include <lib/cpus/errata.h>
23 #include <lib/extensions/pauth.h>
24 #include <lib/pmf/pmf.h>
25 #include <lib/utils.h>
26 #include <plat/common/platform.h>
27 #include <smccc_helpers.h>
28 #include <tools_share/uuid.h>
29 
30 #include "bl1_private.h"
31 
32 static void bl1_load_bl2(void);
33 
34 #if ENABLE_PAUTH
35 uint64_t bl1_apiakey[2];
36 #endif
37 
38 #if ENABLE_RUNTIME_INSTRUMENTATION
39 	PMF_REGISTER_SERVICE(bl_svc, PMF_RT_INSTR_SVC_ID,
40 		BL_TOTAL_IDS, PMF_DUMP_ENABLE)
41 #endif
42 
43 /*******************************************************************************
44  * Setup function for BL1.
45  * Also perform late architectural and platform specific initialization.
46  * It also queries the platform to load and run next BL image. Only called
47  * by the primary cpu after a cold boot.
48  ******************************************************************************/
49 void __no_pauth bl1_main(void)
50 {
51 	unsigned int image_id;
52 
53 	/* Enable early console if EARLY_CONSOLE flag is enabled */
54 	plat_setup_early_console();
55 
56 	/* Perform early platform-specific setup */
57 	bl1_early_platform_setup();
58 
59 	/* Perform late platform-specific setup */
60 	bl1_plat_arch_setup();
61 
62 	if (is_feat_pauth_supported()) {
63 		pauth_init_enable_el3();
64 	}
65 
66 #if ENABLE_RUNTIME_INSTRUMENTATION
67 	PMF_CAPTURE_TIMESTAMP(bl_svc, BL1_ENTRY, PMF_CACHE_MAINT);
68 #endif
69 
70 	/* Announce our arrival */
71 	NOTICE(FIRMWARE_WELCOME_STR);
72 	NOTICE("BL1: %s\n", build_version_string);
73 	NOTICE("BL1: %s\n", build_message);
74 
75 	INFO("BL1: RAM %p - %p\n", (void *)BL1_RAM_BASE, (void *)BL1_RAM_LIMIT);
76 
77 	print_errata_status();
78 
79 #if ENABLE_ASSERTIONS
80 	u_register_t val;
81 	/*
82 	 * Ensure that MMU/Caches and coherency are turned on
83 	 */
84 #ifdef __aarch64__
85 	val = read_sctlr_el3();
86 #else
87 	val = read_sctlr();
88 #endif
89 	assert((val & SCTLR_M_BIT) != 0);
90 	assert((val & SCTLR_C_BIT) != 0);
91 	assert((val & SCTLR_I_BIT) != 0);
92 	/*
93 	 * Check that Cache Writeback Granule (CWG) in CTR_EL0 matches the
94 	 * provided platform value
95 	 */
96 	val = (read_ctr_el0() >> CTR_CWG_SHIFT) & CTR_CWG_MASK;
97 	/*
98 	 * If CWG is zero, then no CWG information is available but we can
99 	 * at least check the platform value is less than the architectural
100 	 * maximum.
101 	 */
102 	if (val != 0)
103 		assert(CACHE_WRITEBACK_GRANULE == SIZE_FROM_LOG2_WORDS(val));
104 	else
105 		assert(CACHE_WRITEBACK_GRANULE <= MAX_CACHE_LINE_SIZE);
106 #endif /* ENABLE_ASSERTIONS */
107 
108 	/* Perform remaining generic architectural setup from EL3 */
109 	bl1_arch_setup();
110 
111 	crypto_mod_init();
112 
113 	/* Initialize authentication module */
114 	auth_mod_init();
115 
116 	/* Initialize the measured boot */
117 	bl1_plat_mboot_init();
118 
119 	/* Perform platform setup in BL1. */
120 	bl1_platform_setup();
121 
122 	/* Get the image id of next image to load and run. */
123 	image_id = bl1_plat_get_next_image_id();
124 
125 	/*
126 	 * We currently interpret any image id other than
127 	 * BL2_IMAGE_ID as the start of firmware update.
128 	 */
129 	if (image_id == BL2_IMAGE_ID)
130 		bl1_load_bl2();
131 	else
132 		NOTICE("BL1-FWU: *******FWU Process Started*******\n");
133 
134 	/* Teardown the measured boot driver */
135 	bl1_plat_mboot_finish();
136 
137 	crypto_mod_finish();
138 
139 	bl1_prepare_next_image(image_id);
140 
141 #if ENABLE_RUNTIME_INSTRUMENTATION
142 	PMF_CAPTURE_TIMESTAMP(bl_svc, BL1_EXIT, PMF_CACHE_MAINT);
143 #endif
144 
145 	console_flush();
146 
147 	/* Disable pointer authentication before jumping to next boot image. */
148 	if (is_feat_pauth_supported()) {
149 		pauth_disable_el3();
150 	}
151 }
152 
153 /*******************************************************************************
154  * This function locates and loads the BL2 raw binary image in the trusted SRAM.
155  * Called by the primary cpu after a cold boot.
156  * TODO: Add support for alternative image load mechanism e.g using virtio/elf
157  * loader etc.
158  ******************************************************************************/
159 static void bl1_load_bl2(void)
160 {
161 	image_desc_t *desc;
162 	image_info_t *info;
163 	int err;
164 
165 	/* Get the image descriptor */
166 	desc = bl1_plat_get_image_desc(BL2_IMAGE_ID);
167 	assert(desc != NULL);
168 
169 	/* Get the image info */
170 	info = &desc->image_info;
171 	INFO("BL1: Loading BL2\n");
172 
173 	err = bl1_plat_handle_pre_image_load(BL2_IMAGE_ID);
174 	if (err != 0) {
175 		ERROR("Failure in pre image load handling of BL2 (%d)\n", err);
176 		plat_error_handler(err);
177 	}
178 
179 	err = load_auth_image(BL2_IMAGE_ID, info);
180 	if (err != 0) {
181 		ERROR("Failed to load BL2 firmware.\n");
182 		plat_error_handler(err);
183 	}
184 
185 	/* Allow platform to handle image information. */
186 	err = bl1_plat_handle_post_image_load(BL2_IMAGE_ID);
187 	if (err != 0) {
188 		ERROR("Failure in post image load handling of BL2 (%d)\n", err);
189 		plat_error_handler(err);
190 	}
191 
192 	NOTICE("BL1: Booting BL2\n");
193 }
194 
195 /*******************************************************************************
196  * Function called just before handing over to the next BL to inform the user
197  * about the boot progress. In debug mode, also print details about the BL
198  * image's execution context.
199  ******************************************************************************/
200 void bl1_print_next_bl_ep_info(const entry_point_info_t *bl_ep_info)
201 {
202 #ifdef __aarch64__
203 	NOTICE("BL1: Booting BL31\n");
204 #else
205 	NOTICE("BL1: Booting BL32\n");
206 #endif /* __aarch64__ */
207 	print_entry_point_info(bl_ep_info);
208 }
209 
210 #if SPIN_ON_BL1_EXIT
211 void print_debug_loop_message(void)
212 {
213 	NOTICE("BL1: Debug loop, spinning forever\n");
214 	NOTICE("BL1: Please connect the debugger to continue\n");
215 }
216 #endif
217 
218 /*******************************************************************************
219  * Top level handler for servicing BL1 SMCs.
220  ******************************************************************************/
221 u_register_t bl1_smc_handler(unsigned int smc_fid,
222 	u_register_t x1,
223 	u_register_t x2,
224 	u_register_t x3,
225 	u_register_t x4,
226 	void *cookie,
227 	void *handle,
228 	unsigned int flags)
229 {
230 	/* BL1 Service UUID */
231 	DEFINE_SVC_UUID2(bl1_svc_uid,
232 		U(0xd46739fd), 0xcb72, 0x9a4d, 0xb5, 0x75,
233 		0x67, 0x15, 0xd6, 0xf4, 0xbb, 0x4a);
234 
235 
236 #if TRUSTED_BOARD_BOOT
237 	/*
238 	 * Dispatch FWU calls to FWU SMC handler and return its return
239 	 * value
240 	 */
241 	if (is_fwu_fid(smc_fid)) {
242 		return bl1_fwu_smc_handler(smc_fid, x1, x2, x3, x4, cookie,
243 			handle, flags);
244 	}
245 #endif
246 
247 	switch (smc_fid) {
248 	case BL1_SMC_CALL_COUNT:
249 		SMC_RET1(handle, BL1_NUM_SMC_CALLS);
250 
251 	case BL1_SMC_UID:
252 		SMC_UUID_RET(handle, bl1_svc_uid);
253 
254 	case BL1_SMC_VERSION:
255 		SMC_RET1(handle, BL1_SMC_MAJOR_VER | BL1_SMC_MINOR_VER);
256 
257 	default:
258 		WARN("Unimplemented BL1 SMC Call: 0x%x\n", smc_fid);
259 		SMC_RET1(handle, SMC_UNK);
260 	}
261 }
262 
263 /*******************************************************************************
264  * BL1 SMC wrapper.  This function is only used in AArch32 mode to ensure ABI
265  * compliance when invoking bl1_smc_handler.
266  ******************************************************************************/
267 u_register_t bl1_smc_wrapper(uint32_t smc_fid,
268 	void *cookie,
269 	void *handle,
270 	unsigned int flags)
271 {
272 	u_register_t x1, x2, x3, x4;
273 
274 	assert(handle != NULL);
275 
276 	get_smc_params_from_ctx(handle, x1, x2, x3, x4);
277 	return bl1_smc_handler(smc_fid, x1, x2, x3, x4, cookie, handle, flags);
278 }
279