1 /* 2 * Copyright (c) 2013-2025, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 9 #include <platform_def.h> 10 11 #include <arch.h> 12 #include <arch_features.h> 13 #include <arch_helpers.h> 14 #include <bl1/bl1.h> 15 #include <common/bl_common.h> 16 #include <common/build_message.h> 17 #include <common/debug.h> 18 #include <drivers/auth/auth_mod.h> 19 #include <drivers/auth/crypto_mod.h> 20 #include <drivers/console.h> 21 #include <lib/bootmarker_capture.h> 22 #include <lib/cpus/errata.h> 23 #include <lib/el3_runtime/context_mgmt.h> 24 #include <lib/extensions/pauth.h> 25 #include <lib/pmf/pmf.h> 26 #include <lib/utils.h> 27 #include <plat/common/platform.h> 28 #include <smccc_helpers.h> 29 #include <tools_share/uuid.h> 30 31 #include "bl1_private.h" 32 33 static void bl1_load_bl2(void); 34 35 #if ENABLE_PAUTH 36 uint64_t bl1_apiakey[2]; 37 #endif 38 39 #if ENABLE_RUNTIME_INSTRUMENTATION 40 PMF_REGISTER_SERVICE(bl_svc, PMF_RT_INSTR_SVC_ID, 41 BL_TOTAL_IDS, PMF_DUMP_ENABLE) 42 #endif 43 44 /******************************************************************************* 45 * Setup function for BL1. 46 * Also perform late architectural and platform specific initialization. 47 * It also queries the platform to load and run next BL image. Only called 48 * by the primary cpu after a cold boot. 49 ******************************************************************************/ 50 void __no_pauth bl1_main(void) 51 { 52 unsigned int image_id; 53 54 /* Enable early console if EARLY_CONSOLE flag is enabled */ 55 plat_setup_early_console(); 56 57 /* Perform early platform-specific setup */ 58 bl1_early_platform_setup(); 59 60 /* Perform late platform-specific setup */ 61 bl1_plat_arch_setup(); 62 63 /* Init registers that don't get contexted */ 64 cm_manage_extensions_el3(plat_my_core_pos()); 65 66 /* When BL2 runs in Secure world, it needs a coherent context. */ 67 #if !BL2_RUNS_AT_EL3 68 /* Init per-world context registers. */ 69 cm_manage_extensions_per_world(); 70 #endif 71 72 #if ENABLE_RUNTIME_INSTRUMENTATION 73 PMF_CAPTURE_TIMESTAMP(bl_svc, BL1_ENTRY, PMF_CACHE_MAINT); 74 #endif 75 76 /* Announce our arrival */ 77 NOTICE(FIRMWARE_WELCOME_STR); 78 NOTICE("BL1: %s\n", build_version_string); 79 NOTICE("BL1: %s\n", build_message); 80 81 INFO("BL1: RAM %p - %p\n", (void *)BL1_RAM_BASE, (void *)BL1_RAM_LIMIT); 82 83 print_errata_status(); 84 85 #if ENABLE_ASSERTIONS 86 u_register_t val; 87 /* 88 * Ensure that MMU/Caches and coherency are turned on 89 */ 90 #ifdef __aarch64__ 91 val = read_sctlr_el3(); 92 #else 93 val = read_sctlr(); 94 #endif 95 assert((val & SCTLR_M_BIT) != 0); 96 assert((val & SCTLR_C_BIT) != 0); 97 assert((val & SCTLR_I_BIT) != 0); 98 /* 99 * Check that Cache Writeback Granule (CWG) in CTR_EL0 matches the 100 * provided platform value 101 */ 102 val = (read_ctr_el0() >> CTR_CWG_SHIFT) & CTR_CWG_MASK; 103 /* 104 * If CWG is zero, then no CWG information is available but we can 105 * at least check the platform value is less than the architectural 106 * maximum. 107 */ 108 if (val != 0) 109 assert(CACHE_WRITEBACK_GRANULE == SIZE_FROM_LOG2_WORDS(val)); 110 else 111 assert(CACHE_WRITEBACK_GRANULE <= MAX_CACHE_LINE_SIZE); 112 #endif /* ENABLE_ASSERTIONS */ 113 114 /* Perform remaining generic architectural setup from EL3 */ 115 bl1_arch_setup(); 116 117 crypto_mod_init(); 118 119 /* Initialize authentication module */ 120 auth_mod_init(); 121 122 /* Initialize the measured boot */ 123 bl1_plat_mboot_init(); 124 125 /* Perform platform setup in BL1. */ 126 bl1_platform_setup(); 127 128 /* Get the image id of next image to load and run. */ 129 image_id = bl1_plat_get_next_image_id(); 130 131 /* 132 * We currently interpret any image id other than 133 * BL2_IMAGE_ID as the start of firmware update. 134 */ 135 if (image_id == BL2_IMAGE_ID) 136 bl1_load_bl2(); 137 else 138 NOTICE("BL1-FWU: *******FWU Process Started*******\n"); 139 140 /* Teardown the measured boot driver */ 141 bl1_plat_mboot_finish(); 142 143 crypto_mod_finish(); 144 145 bl1_prepare_next_image(image_id); 146 147 #if ENABLE_RUNTIME_INSTRUMENTATION 148 PMF_CAPTURE_TIMESTAMP(bl_svc, BL1_EXIT, PMF_CACHE_MAINT); 149 #endif 150 151 console_flush(); 152 153 /* Disable pointer authentication before jumping to next boot image. */ 154 if (is_feat_pauth_supported()) { 155 pauth_disable_el3(); 156 } 157 } 158 159 /******************************************************************************* 160 * This function locates and loads the BL2 raw binary image in the trusted SRAM. 161 * Called by the primary cpu after a cold boot. 162 * TODO: Add support for alternative image load mechanism e.g using virtio/elf 163 * loader etc. 164 ******************************************************************************/ 165 static void bl1_load_bl2(void) 166 { 167 image_desc_t *desc; 168 image_info_t *info; 169 int err; 170 171 /* Get the image descriptor */ 172 desc = bl1_plat_get_image_desc(BL2_IMAGE_ID); 173 assert(desc != NULL); 174 175 /* Get the image info */ 176 info = &desc->image_info; 177 INFO("BL1: Loading BL2\n"); 178 179 err = bl1_plat_handle_pre_image_load(BL2_IMAGE_ID); 180 if (err != 0) { 181 ERROR("Failure in pre image load handling of BL2 (%d)\n", err); 182 plat_error_handler(err); 183 } 184 185 err = load_auth_image(BL2_IMAGE_ID, info); 186 if (err != 0) { 187 ERROR("Failed to load BL2 firmware.\n"); 188 plat_error_handler(err); 189 } 190 191 /* Allow platform to handle image information. */ 192 err = bl1_plat_handle_post_image_load(BL2_IMAGE_ID); 193 if (err != 0) { 194 ERROR("Failure in post image load handling of BL2 (%d)\n", err); 195 plat_error_handler(err); 196 } 197 198 NOTICE("BL1: Booting BL2\n"); 199 } 200 201 /******************************************************************************* 202 * Function called just before handing over to the next BL to inform the user 203 * about the boot progress. In debug mode, also print details about the BL 204 * image's execution context. 205 ******************************************************************************/ 206 void bl1_print_next_bl_ep_info(const entry_point_info_t *bl_ep_info) 207 { 208 #ifdef __aarch64__ 209 NOTICE("BL1: Booting BL31\n"); 210 #else 211 NOTICE("BL1: Booting BL32\n"); 212 #endif /* __aarch64__ */ 213 print_entry_point_info(bl_ep_info); 214 } 215 216 #if SPIN_ON_BL1_EXIT 217 void print_debug_loop_message(void) 218 { 219 NOTICE("BL1: Debug loop, spinning forever\n"); 220 NOTICE("BL1: Please connect the debugger to continue\n"); 221 } 222 #endif 223 224 /******************************************************************************* 225 * Top level handler for servicing BL1 SMCs. 226 ******************************************************************************/ 227 u_register_t bl1_smc_handler(unsigned int smc_fid, 228 u_register_t x1, 229 u_register_t x2, 230 u_register_t x3, 231 u_register_t x4, 232 void *cookie, 233 void *handle, 234 unsigned int flags) 235 { 236 /* BL1 Service UUID */ 237 DEFINE_SVC_UUID2(bl1_svc_uid, 238 U(0xd46739fd), 0xcb72, 0x9a4d, 0xb5, 0x75, 239 0x67, 0x15, 0xd6, 0xf4, 0xbb, 0x4a); 240 241 242 #if TRUSTED_BOARD_BOOT 243 /* 244 * Dispatch FWU calls to FWU SMC handler and return its return 245 * value 246 */ 247 if (is_fwu_fid(smc_fid)) { 248 return bl1_fwu_smc_handler(smc_fid, x1, x2, x3, x4, cookie, 249 handle, flags); 250 } 251 #endif 252 253 switch (smc_fid) { 254 case BL1_SMC_CALL_COUNT: 255 SMC_RET1(handle, BL1_NUM_SMC_CALLS); 256 257 case BL1_SMC_UID: 258 SMC_UUID_RET(handle, bl1_svc_uid); 259 260 case BL1_SMC_VERSION: 261 SMC_RET1(handle, BL1_SMC_MAJOR_VER | BL1_SMC_MINOR_VER); 262 263 default: 264 WARN("Unimplemented BL1 SMC Call: 0x%x\n", smc_fid); 265 SMC_RET1(handle, SMC_UNK); 266 } 267 } 268 269 /******************************************************************************* 270 * BL1 SMC wrapper. This function is only used in AArch32 mode to ensure ABI 271 * compliance when invoking bl1_smc_handler. 272 ******************************************************************************/ 273 u_register_t bl1_smc_wrapper(uint32_t smc_fid, 274 void *cookie, 275 void *handle, 276 unsigned int flags) 277 { 278 u_register_t x1, x2, x3, x4; 279 280 assert(handle != NULL); 281 282 get_smc_params_from_ctx(handle, x1, x2, x3, x4); 283 return bl1_smc_handler(smc_fid, x1, x2, x3, x4, cookie, handle, flags); 284 } 285