1 /* 2 * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <arch.h> 32 #include <arch_helpers.h> 33 #include <assert.h> 34 #include <auth_mod.h> 35 #include <bl_common.h> 36 #include <debug.h> 37 #include <platform.h> 38 #include <platform_def.h> 39 #include "bl1_private.h" 40 41 42 static void bl1_load_bl2(void); 43 44 /******************************************************************************* 45 * The next function has a weak definition. Platform specific code can override 46 * it if it wishes to. 47 ******************************************************************************/ 48 #pragma weak bl1_init_bl2_mem_layout 49 50 /******************************************************************************* 51 * Function that takes a memory layout into which BL2 has been loaded and 52 * populates a new memory layout for BL2 that ensures that BL1's data sections 53 * resident in secure RAM are not visible to BL2. 54 ******************************************************************************/ 55 void bl1_init_bl2_mem_layout(const meminfo_t *bl1_mem_layout, 56 meminfo_t *bl2_mem_layout) 57 { 58 const size_t bl1_size = BL1_RAM_LIMIT - BL1_RAM_BASE; 59 60 assert(bl1_mem_layout != NULL); 61 assert(bl2_mem_layout != NULL); 62 63 /* Check that BL1's memory is lying outside of the free memory */ 64 assert((BL1_RAM_LIMIT <= bl1_mem_layout->free_base) || 65 (BL1_RAM_BASE >= bl1_mem_layout->free_base + 66 bl1_mem_layout->free_size)); 67 68 /* Remove BL1 RW data from the scope of memory visible to BL2 */ 69 *bl2_mem_layout = *bl1_mem_layout; 70 reserve_mem(&bl2_mem_layout->total_base, 71 &bl2_mem_layout->total_size, 72 BL1_RAM_BASE, 73 bl1_size); 74 75 flush_dcache_range((unsigned long)bl2_mem_layout, sizeof(meminfo_t)); 76 } 77 78 /******************************************************************************* 79 * Function to perform late architectural and platform specific initialization. 80 * It also queries the platform to load and run next BL image. Only called 81 * by the primary cpu after a cold boot. 82 ******************************************************************************/ 83 void bl1_main(void) 84 { 85 unsigned int image_id; 86 87 /* Announce our arrival */ 88 NOTICE(FIRMWARE_WELCOME_STR); 89 NOTICE("BL1: %s\n", version_string); 90 NOTICE("BL1: %s\n", build_message); 91 92 INFO("BL1: RAM 0x%lx - 0x%lx\n", BL1_RAM_BASE, BL1_RAM_LIMIT); 93 94 95 #if DEBUG 96 unsigned long val; 97 /* 98 * Ensure that MMU/Caches and coherency are turned on 99 */ 100 val = read_sctlr_el3(); 101 assert(val & SCTLR_M_BIT); 102 assert(val & SCTLR_C_BIT); 103 assert(val & SCTLR_I_BIT); 104 /* 105 * Check that Cache Writeback Granule (CWG) in CTR_EL0 matches the 106 * provided platform value 107 */ 108 val = (read_ctr_el0() >> CTR_CWG_SHIFT) & CTR_CWG_MASK; 109 /* 110 * If CWG is zero, then no CWG information is available but we can 111 * at least check the platform value is less than the architectural 112 * maximum. 113 */ 114 if (val != 0) 115 assert(CACHE_WRITEBACK_GRANULE == SIZE_FROM_LOG2_WORDS(val)); 116 else 117 assert(CACHE_WRITEBACK_GRANULE <= MAX_CACHE_LINE_SIZE); 118 #endif 119 120 /* Perform remaining generic architectural setup from EL3 */ 121 bl1_arch_setup(); 122 123 #if TRUSTED_BOARD_BOOT 124 /* Initialize authentication module */ 125 auth_mod_init(); 126 #endif /* TRUSTED_BOARD_BOOT */ 127 128 /* Perform platform setup in BL1. */ 129 bl1_platform_setup(); 130 131 /* Get the image id of next image to load and run. */ 132 image_id = bl1_plat_get_next_image_id(); 133 134 if (image_id == BL2_IMAGE_ID) 135 bl1_load_bl2(); 136 137 bl1_prepare_next_image(image_id); 138 } 139 140 /******************************************************************************* 141 * This function locates and loads the BL2 raw binary image in the trusted SRAM. 142 * Called by the primary cpu after a cold boot. 143 * TODO: Add support for alternative image load mechanism e.g using virtio/elf 144 * loader etc. 145 ******************************************************************************/ 146 void bl1_load_bl2(void) 147 { 148 image_desc_t *image_desc; 149 image_info_t *image_info; 150 entry_point_info_t *ep_info; 151 meminfo_t *bl1_tzram_layout; 152 meminfo_t *bl2_tzram_layout; 153 int err; 154 155 /* Get the image descriptor */ 156 image_desc = bl1_plat_get_image_desc(BL2_IMAGE_ID); 157 assert(image_desc); 158 159 /* Get the image info */ 160 image_info = &image_desc->image_info; 161 162 /* Get the entry point info */ 163 ep_info = &image_desc->ep_info; 164 165 /* Find out how much free trusted ram remains after BL1 load */ 166 bl1_tzram_layout = bl1_plat_sec_mem_layout(); 167 168 INFO("BL1: Loading BL2\n"); 169 170 /* Load the BL2 image */ 171 err = load_auth_image(bl1_tzram_layout, 172 BL2_IMAGE_ID, 173 image_info->image_base, 174 image_info, 175 ep_info); 176 177 if (err) { 178 ERROR("Failed to load BL2 firmware.\n"); 179 plat_error_handler(err); 180 } 181 182 /* 183 * Create a new layout of memory for BL2 as seen by BL1 i.e. 184 * tell it the amount of total and free memory available. 185 * This layout is created at the first free address visible 186 * to BL2. BL2 will read the memory layout before using its 187 * memory for other purposes. 188 */ 189 bl2_tzram_layout = (meminfo_t *) bl1_tzram_layout->free_base; 190 bl1_init_bl2_mem_layout(bl1_tzram_layout, bl2_tzram_layout); 191 192 ep_info->args.arg1 = (unsigned long)bl2_tzram_layout; 193 NOTICE("BL1: Booting BL2\n"); 194 VERBOSE("BL1: BL2 memory layout address = 0x%llx\n", 195 (unsigned long long) bl2_tzram_layout); 196 } 197 198 /******************************************************************************* 199 * Function called just before handing over to BL31 to inform the user about 200 * the boot progress. In debug mode, also print details about the BL31 image's 201 * execution context. 202 ******************************************************************************/ 203 void bl1_print_bl31_ep_info(const entry_point_info_t *bl31_ep_info) 204 { 205 NOTICE("BL1: Booting BL3-1\n"); 206 print_entry_point_info(bl31_ep_info); 207 } 208 209 #if SPIN_ON_BL1_EXIT 210 void print_debug_loop_message(void) 211 { 212 NOTICE("BL1: Debug loop, spinning forever\n"); 213 NOTICE("BL1: Please connect the debugger to continue\n"); 214 } 215 #endif 216