1 /* 2 * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <arch.h> 32 #include <arch_helpers.h> 33 #include <assert.h> 34 #include <auth_mod.h> 35 #include <bl1.h> 36 #include <bl_common.h> 37 #include <debug.h> 38 #include <errata_report.h> 39 #include <platform.h> 40 #include <platform_def.h> 41 #include <smcc_helpers.h> 42 #include <utils.h> 43 #include "bl1_private.h" 44 #include <uuid.h> 45 46 /* BL1 Service UUID */ 47 DEFINE_SVC_UUID(bl1_svc_uid, 48 0xfd3967d4, 0x72cb, 0x4d9a, 0xb5, 0x75, 49 0x67, 0x15, 0xd6, 0xf4, 0xbb, 0x4a); 50 51 52 static void bl1_load_bl2(void); 53 54 /******************************************************************************* 55 * The next function has a weak definition. Platform specific code can override 56 * it if it wishes to. 57 ******************************************************************************/ 58 #pragma weak bl1_init_bl2_mem_layout 59 60 /******************************************************************************* 61 * Function that takes a memory layout into which BL2 has been loaded and 62 * populates a new memory layout for BL2 that ensures that BL1's data sections 63 * resident in secure RAM are not visible to BL2. 64 ******************************************************************************/ 65 void bl1_init_bl2_mem_layout(const meminfo_t *bl1_mem_layout, 66 meminfo_t *bl2_mem_layout) 67 { 68 69 assert(bl1_mem_layout != NULL); 70 assert(bl2_mem_layout != NULL); 71 72 #if LOAD_IMAGE_V2 73 /* 74 * Remove BL1 RW data from the scope of memory visible to BL2. 75 * This is assuming BL1 RW data is at the top of bl1_mem_layout. 76 */ 77 assert(BL1_RW_BASE > bl1_mem_layout->total_base); 78 bl2_mem_layout->total_base = bl1_mem_layout->total_base; 79 bl2_mem_layout->total_size = BL1_RW_BASE - bl1_mem_layout->total_base; 80 #else 81 /* Check that BL1's memory is lying outside of the free memory */ 82 assert((BL1_RAM_LIMIT <= bl1_mem_layout->free_base) || 83 (BL1_RAM_BASE >= bl1_mem_layout->free_base + 84 bl1_mem_layout->free_size)); 85 86 /* Remove BL1 RW data from the scope of memory visible to BL2 */ 87 *bl2_mem_layout = *bl1_mem_layout; 88 reserve_mem(&bl2_mem_layout->total_base, 89 &bl2_mem_layout->total_size, 90 BL1_RAM_BASE, 91 BL1_RAM_LIMIT - BL1_RAM_BASE); 92 #endif /* LOAD_IMAGE_V2 */ 93 94 flush_dcache_range((unsigned long)bl2_mem_layout, sizeof(meminfo_t)); 95 } 96 97 /******************************************************************************* 98 * Function to perform late architectural and platform specific initialization. 99 * It also queries the platform to load and run next BL image. Only called 100 * by the primary cpu after a cold boot. 101 ******************************************************************************/ 102 void bl1_main(void) 103 { 104 unsigned int image_id; 105 106 /* Announce our arrival */ 107 NOTICE(FIRMWARE_WELCOME_STR); 108 NOTICE("BL1: %s\n", version_string); 109 NOTICE("BL1: %s\n", build_message); 110 111 INFO("BL1: RAM %p - %p\n", (void *)BL1_RAM_BASE, 112 (void *)BL1_RAM_LIMIT); 113 114 print_errata_status(); 115 116 #if DEBUG 117 u_register_t val; 118 /* 119 * Ensure that MMU/Caches and coherency are turned on 120 */ 121 #ifdef AARCH32 122 val = read_sctlr(); 123 #else 124 val = read_sctlr_el3(); 125 #endif 126 assert(val & SCTLR_M_BIT); 127 assert(val & SCTLR_C_BIT); 128 assert(val & SCTLR_I_BIT); 129 /* 130 * Check that Cache Writeback Granule (CWG) in CTR_EL0 matches the 131 * provided platform value 132 */ 133 val = (read_ctr_el0() >> CTR_CWG_SHIFT) & CTR_CWG_MASK; 134 /* 135 * If CWG is zero, then no CWG information is available but we can 136 * at least check the platform value is less than the architectural 137 * maximum. 138 */ 139 if (val != 0) 140 assert(CACHE_WRITEBACK_GRANULE == SIZE_FROM_LOG2_WORDS(val)); 141 else 142 assert(CACHE_WRITEBACK_GRANULE <= MAX_CACHE_LINE_SIZE); 143 #endif 144 145 /* Perform remaining generic architectural setup from EL3 */ 146 bl1_arch_setup(); 147 148 #if TRUSTED_BOARD_BOOT 149 /* Initialize authentication module */ 150 auth_mod_init(); 151 #endif /* TRUSTED_BOARD_BOOT */ 152 153 /* Perform platform setup in BL1. */ 154 bl1_platform_setup(); 155 156 /* Get the image id of next image to load and run. */ 157 image_id = bl1_plat_get_next_image_id(); 158 159 /* 160 * We currently interpret any image id other than 161 * BL2_IMAGE_ID as the start of firmware update. 162 */ 163 if (image_id == BL2_IMAGE_ID) 164 bl1_load_bl2(); 165 else 166 NOTICE("BL1-FWU: *******FWU Process Started*******\n"); 167 168 bl1_prepare_next_image(image_id); 169 } 170 171 /******************************************************************************* 172 * This function locates and loads the BL2 raw binary image in the trusted SRAM. 173 * Called by the primary cpu after a cold boot. 174 * TODO: Add support for alternative image load mechanism e.g using virtio/elf 175 * loader etc. 176 ******************************************************************************/ 177 void bl1_load_bl2(void) 178 { 179 image_desc_t *image_desc; 180 image_info_t *image_info; 181 entry_point_info_t *ep_info; 182 meminfo_t *bl1_tzram_layout; 183 meminfo_t *bl2_tzram_layout; 184 int err; 185 186 /* Get the image descriptor */ 187 image_desc = bl1_plat_get_image_desc(BL2_IMAGE_ID); 188 assert(image_desc); 189 190 /* Get the image info */ 191 image_info = &image_desc->image_info; 192 193 /* Get the entry point info */ 194 ep_info = &image_desc->ep_info; 195 196 /* Find out how much free trusted ram remains after BL1 load */ 197 bl1_tzram_layout = bl1_plat_sec_mem_layout(); 198 199 INFO("BL1: Loading BL2\n"); 200 201 #if LOAD_IMAGE_V2 202 err = load_auth_image(BL2_IMAGE_ID, image_info); 203 #else 204 /* Load the BL2 image */ 205 err = load_auth_image(bl1_tzram_layout, 206 BL2_IMAGE_ID, 207 image_info->image_base, 208 image_info, 209 ep_info); 210 211 #endif /* LOAD_IMAGE_V2 */ 212 213 if (err) { 214 ERROR("Failed to load BL2 firmware.\n"); 215 plat_error_handler(err); 216 } 217 218 /* 219 * Create a new layout of memory for BL2 as seen by BL1 i.e. 220 * tell it the amount of total and free memory available. 221 * This layout is created at the first free address visible 222 * to BL2. BL2 will read the memory layout before using its 223 * memory for other purposes. 224 */ 225 #if LOAD_IMAGE_V2 226 bl2_tzram_layout = (meminfo_t *) bl1_tzram_layout->total_base; 227 #else 228 bl2_tzram_layout = (meminfo_t *) bl1_tzram_layout->free_base; 229 #endif /* LOAD_IMAGE_V2 */ 230 231 bl1_init_bl2_mem_layout(bl1_tzram_layout, bl2_tzram_layout); 232 233 ep_info->args.arg1 = (uintptr_t)bl2_tzram_layout; 234 NOTICE("BL1: Booting BL2\n"); 235 VERBOSE("BL1: BL2 memory layout address = %p\n", 236 (void *) bl2_tzram_layout); 237 } 238 239 /******************************************************************************* 240 * Function called just before handing over to the next BL to inform the user 241 * about the boot progress. In debug mode, also print details about the BL 242 * image's execution context. 243 ******************************************************************************/ 244 void bl1_print_next_bl_ep_info(const entry_point_info_t *bl_ep_info) 245 { 246 #ifdef AARCH32 247 NOTICE("BL1: Booting BL32\n"); 248 #else 249 NOTICE("BL1: Booting BL31\n"); 250 #endif /* AARCH32 */ 251 print_entry_point_info(bl_ep_info); 252 } 253 254 #if SPIN_ON_BL1_EXIT 255 void print_debug_loop_message(void) 256 { 257 NOTICE("BL1: Debug loop, spinning forever\n"); 258 NOTICE("BL1: Please connect the debugger to continue\n"); 259 } 260 #endif 261 262 /******************************************************************************* 263 * Top level handler for servicing BL1 SMCs. 264 ******************************************************************************/ 265 register_t bl1_smc_handler(unsigned int smc_fid, 266 register_t x1, 267 register_t x2, 268 register_t x3, 269 register_t x4, 270 void *cookie, 271 void *handle, 272 unsigned int flags) 273 { 274 275 #if TRUSTED_BOARD_BOOT 276 /* 277 * Dispatch FWU calls to FWU SMC handler and return its return 278 * value 279 */ 280 if (is_fwu_fid(smc_fid)) { 281 return bl1_fwu_smc_handler(smc_fid, x1, x2, x3, x4, cookie, 282 handle, flags); 283 } 284 #endif 285 286 switch (smc_fid) { 287 case BL1_SMC_CALL_COUNT: 288 SMC_RET1(handle, BL1_NUM_SMC_CALLS); 289 290 case BL1_SMC_UID: 291 SMC_UUID_RET(handle, bl1_svc_uid); 292 293 case BL1_SMC_VERSION: 294 SMC_RET1(handle, BL1_SMC_MAJOR_VER | BL1_SMC_MINOR_VER); 295 296 default: 297 break; 298 } 299 300 WARN("Unimplemented BL1 SMC Call: 0x%x \n", smc_fid); 301 SMC_RET1(handle, SMC_UNK); 302 } 303