1 /* 2 * Copyright (c) 2013-2025, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 9 #include <platform_def.h> 10 11 #include <arch.h> 12 #include <arch_features.h> 13 #include <arch_helpers.h> 14 #include <bl1/bl1.h> 15 #include <common/bl_common.h> 16 #include <common/build_message.h> 17 #include <common/debug.h> 18 #include <drivers/auth/auth_mod.h> 19 #include <drivers/auth/crypto_mod.h> 20 #include <drivers/console.h> 21 #include <lib/bootmarker_capture.h> 22 #include <lib/cpus/errata.h> 23 #include <lib/pmf/pmf.h> 24 #include <lib/utils.h> 25 #include <plat/common/platform.h> 26 #include <smccc_helpers.h> 27 #include <tools_share/uuid.h> 28 29 #include "bl1_private.h" 30 31 static void bl1_load_bl2(void); 32 33 #if ENABLE_PAUTH 34 uint64_t bl1_apiakey[2]; 35 #endif 36 37 #if ENABLE_RUNTIME_INSTRUMENTATION 38 PMF_REGISTER_SERVICE(bl_svc, PMF_RT_INSTR_SVC_ID, 39 BL_TOTAL_IDS, PMF_DUMP_ENABLE) 40 #endif 41 42 /******************************************************************************* 43 * Setup function for BL1. 44 ******************************************************************************/ 45 void bl1_setup(void) 46 { 47 /* Enable early console if EARLY_CONSOLE flag is enabled */ 48 plat_setup_early_console(); 49 50 /* Perform early platform-specific setup */ 51 bl1_early_platform_setup(); 52 53 /* Perform late platform-specific setup */ 54 bl1_plat_arch_setup(); 55 } 56 57 /******************************************************************************* 58 * Function to perform late architectural and platform specific initialization. 59 * It also queries the platform to load and run next BL image. Only called 60 * by the primary cpu after a cold boot. 61 ******************************************************************************/ 62 void bl1_main(void) 63 { 64 unsigned int image_id; 65 66 #if ENABLE_RUNTIME_INSTRUMENTATION 67 PMF_CAPTURE_TIMESTAMP(bl_svc, BL1_ENTRY, PMF_CACHE_MAINT); 68 #endif 69 70 /* Announce our arrival */ 71 NOTICE(FIRMWARE_WELCOME_STR); 72 NOTICE("BL1: %s\n", build_version_string); 73 NOTICE("BL1: %s\n", build_message); 74 75 INFO("BL1: RAM %p - %p\n", (void *)BL1_RAM_BASE, (void *)BL1_RAM_LIMIT); 76 77 print_errata_status(); 78 79 #if ENABLE_ASSERTIONS 80 u_register_t val; 81 /* 82 * Ensure that MMU/Caches and coherency are turned on 83 */ 84 #ifdef __aarch64__ 85 val = read_sctlr_el3(); 86 #else 87 val = read_sctlr(); 88 #endif 89 assert((val & SCTLR_M_BIT) != 0); 90 assert((val & SCTLR_C_BIT) != 0); 91 assert((val & SCTLR_I_BIT) != 0); 92 /* 93 * Check that Cache Writeback Granule (CWG) in CTR_EL0 matches the 94 * provided platform value 95 */ 96 val = (read_ctr_el0() >> CTR_CWG_SHIFT) & CTR_CWG_MASK; 97 /* 98 * If CWG is zero, then no CWG information is available but we can 99 * at least check the platform value is less than the architectural 100 * maximum. 101 */ 102 if (val != 0) 103 assert(CACHE_WRITEBACK_GRANULE == SIZE_FROM_LOG2_WORDS(val)); 104 else 105 assert(CACHE_WRITEBACK_GRANULE <= MAX_CACHE_LINE_SIZE); 106 #endif /* ENABLE_ASSERTIONS */ 107 108 /* Perform remaining generic architectural setup from EL3 */ 109 bl1_arch_setup(); 110 111 crypto_mod_init(); 112 113 /* Initialize authentication module */ 114 auth_mod_init(); 115 116 /* Initialize the measured boot */ 117 bl1_plat_mboot_init(); 118 119 /* Perform platform setup in BL1. */ 120 bl1_platform_setup(); 121 122 /* Get the image id of next image to load and run. */ 123 image_id = bl1_plat_get_next_image_id(); 124 125 /* 126 * We currently interpret any image id other than 127 * BL2_IMAGE_ID as the start of firmware update. 128 */ 129 if (image_id == BL2_IMAGE_ID) 130 bl1_load_bl2(); 131 else 132 NOTICE("BL1-FWU: *******FWU Process Started*******\n"); 133 134 /* Teardown the measured boot driver */ 135 bl1_plat_mboot_finish(); 136 137 crypto_mod_finish(); 138 139 bl1_prepare_next_image(image_id); 140 141 #if ENABLE_RUNTIME_INSTRUMENTATION 142 PMF_CAPTURE_TIMESTAMP(bl_svc, BL1_EXIT, PMF_CACHE_MAINT); 143 #endif 144 145 console_flush(); 146 } 147 148 /******************************************************************************* 149 * This function locates and loads the BL2 raw binary image in the trusted SRAM. 150 * Called by the primary cpu after a cold boot. 151 * TODO: Add support for alternative image load mechanism e.g using virtio/elf 152 * loader etc. 153 ******************************************************************************/ 154 static void bl1_load_bl2(void) 155 { 156 image_desc_t *desc; 157 image_info_t *info; 158 int err; 159 160 /* Get the image descriptor */ 161 desc = bl1_plat_get_image_desc(BL2_IMAGE_ID); 162 assert(desc != NULL); 163 164 /* Get the image info */ 165 info = &desc->image_info; 166 INFO("BL1: Loading BL2\n"); 167 168 err = bl1_plat_handle_pre_image_load(BL2_IMAGE_ID); 169 if (err != 0) { 170 ERROR("Failure in pre image load handling of BL2 (%d)\n", err); 171 plat_error_handler(err); 172 } 173 174 err = load_auth_image(BL2_IMAGE_ID, info); 175 if (err != 0) { 176 ERROR("Failed to load BL2 firmware.\n"); 177 plat_error_handler(err); 178 } 179 180 /* Allow platform to handle image information. */ 181 err = bl1_plat_handle_post_image_load(BL2_IMAGE_ID); 182 if (err != 0) { 183 ERROR("Failure in post image load handling of BL2 (%d)\n", err); 184 plat_error_handler(err); 185 } 186 187 NOTICE("BL1: Booting BL2\n"); 188 } 189 190 /******************************************************************************* 191 * Function called just before handing over to the next BL to inform the user 192 * about the boot progress. In debug mode, also print details about the BL 193 * image's execution context. 194 ******************************************************************************/ 195 void bl1_print_next_bl_ep_info(const entry_point_info_t *bl_ep_info) 196 { 197 #ifdef __aarch64__ 198 NOTICE("BL1: Booting BL31\n"); 199 #else 200 NOTICE("BL1: Booting BL32\n"); 201 #endif /* __aarch64__ */ 202 print_entry_point_info(bl_ep_info); 203 } 204 205 #if SPIN_ON_BL1_EXIT 206 void print_debug_loop_message(void) 207 { 208 NOTICE("BL1: Debug loop, spinning forever\n"); 209 NOTICE("BL1: Please connect the debugger to continue\n"); 210 } 211 #endif 212 213 /******************************************************************************* 214 * Top level handler for servicing BL1 SMCs. 215 ******************************************************************************/ 216 u_register_t bl1_smc_handler(unsigned int smc_fid, 217 u_register_t x1, 218 u_register_t x2, 219 u_register_t x3, 220 u_register_t x4, 221 void *cookie, 222 void *handle, 223 unsigned int flags) 224 { 225 /* BL1 Service UUID */ 226 DEFINE_SVC_UUID2(bl1_svc_uid, 227 U(0xd46739fd), 0xcb72, 0x9a4d, 0xb5, 0x75, 228 0x67, 0x15, 0xd6, 0xf4, 0xbb, 0x4a); 229 230 231 #if TRUSTED_BOARD_BOOT 232 /* 233 * Dispatch FWU calls to FWU SMC handler and return its return 234 * value 235 */ 236 if (is_fwu_fid(smc_fid)) { 237 return bl1_fwu_smc_handler(smc_fid, x1, x2, x3, x4, cookie, 238 handle, flags); 239 } 240 #endif 241 242 switch (smc_fid) { 243 case BL1_SMC_CALL_COUNT: 244 SMC_RET1(handle, BL1_NUM_SMC_CALLS); 245 246 case BL1_SMC_UID: 247 SMC_UUID_RET(handle, bl1_svc_uid); 248 249 case BL1_SMC_VERSION: 250 SMC_RET1(handle, BL1_SMC_MAJOR_VER | BL1_SMC_MINOR_VER); 251 252 default: 253 WARN("Unimplemented BL1 SMC Call: 0x%x\n", smc_fid); 254 SMC_RET1(handle, SMC_UNK); 255 } 256 } 257 258 /******************************************************************************* 259 * BL1 SMC wrapper. This function is only used in AArch32 mode to ensure ABI 260 * compliance when invoking bl1_smc_handler. 261 ******************************************************************************/ 262 u_register_t bl1_smc_wrapper(uint32_t smc_fid, 263 void *cookie, 264 void *handle, 265 unsigned int flags) 266 { 267 u_register_t x1, x2, x3, x4; 268 269 assert(handle != NULL); 270 271 get_smc_params_from_ctx(handle, x1, x2, x3, x4); 272 return bl1_smc_handler(smc_fid, x1, x2, x3, x4, cookie, handle, flags); 273 } 274