14f6ad66aSAchin Gupta /* 2*ab2d31edSDan Handley * Copyright (c) 2013, ARM Limited and Contributors. All rights reserved. 34f6ad66aSAchin Gupta * 44f6ad66aSAchin Gupta * Redistribution and use in source and binary forms, with or without 54f6ad66aSAchin Gupta * modification, are permitted provided that the following conditions are met: 64f6ad66aSAchin Gupta * 74f6ad66aSAchin Gupta * Redistributions of source code must retain the above copyright notice, this 84f6ad66aSAchin Gupta * list of conditions and the following disclaimer. 94f6ad66aSAchin Gupta * 104f6ad66aSAchin Gupta * Redistributions in binary form must reproduce the above copyright notice, 114f6ad66aSAchin Gupta * this list of conditions and the following disclaimer in the documentation 124f6ad66aSAchin Gupta * and/or other materials provided with the distribution. 134f6ad66aSAchin Gupta * 144f6ad66aSAchin Gupta * Neither the name of ARM nor the names of its contributors may be used 154f6ad66aSAchin Gupta * to endorse or promote products derived from this software without specific 164f6ad66aSAchin Gupta * prior written permission. 174f6ad66aSAchin Gupta * 184f6ad66aSAchin Gupta * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 194f6ad66aSAchin Gupta * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 204f6ad66aSAchin Gupta * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 214f6ad66aSAchin Gupta * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 224f6ad66aSAchin Gupta * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 234f6ad66aSAchin Gupta * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 244f6ad66aSAchin Gupta * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 254f6ad66aSAchin Gupta * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 264f6ad66aSAchin Gupta * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 274f6ad66aSAchin Gupta * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 284f6ad66aSAchin Gupta * POSSIBILITY OF SUCH DAMAGE. 294f6ad66aSAchin Gupta */ 304f6ad66aSAchin Gupta 314f6ad66aSAchin Gupta #include <stdio.h> 324f6ad66aSAchin Gupta #include <string.h> 334f6ad66aSAchin Gupta #include <assert.h> 344f6ad66aSAchin Gupta #include <arch_helpers.h> 354f6ad66aSAchin Gupta #include <platform.h> 364f6ad66aSAchin Gupta #include <semihosting.h> 374f6ad66aSAchin Gupta #include <bl1.h> 384f6ad66aSAchin Gupta 394f6ad66aSAchin Gupta void bl1_arch_next_el_setup(void); 404f6ad66aSAchin Gupta 414f6ad66aSAchin Gupta /******************************************************************************* 424f6ad66aSAchin Gupta * Function to perform late architectural and platform specific initialization. 434f6ad66aSAchin Gupta * It also locates and loads the BL2 raw binary image in the trusted DRAM. Only 444f6ad66aSAchin Gupta * called by the primary cpu after a cold boot. 454f6ad66aSAchin Gupta * TODO: Add support for alternative image load mechanism e.g using virtio/elf 464f6ad66aSAchin Gupta * loader etc. 474f6ad66aSAchin Gupta ******************************************************************************/ 484f6ad66aSAchin Gupta void bl1_main(void) 494f6ad66aSAchin Gupta { 504f6ad66aSAchin Gupta unsigned long sctlr_el3 = read_sctlr(); 514f6ad66aSAchin Gupta unsigned long bl2_base; 524f6ad66aSAchin Gupta unsigned int load_type = TOP_LOAD, spsr; 534f6ad66aSAchin Gupta meminfo bl1_tzram_layout, *bl2_tzram_layout = 0x0; 544f6ad66aSAchin Gupta 554f6ad66aSAchin Gupta /* 564f6ad66aSAchin Gupta * Ensure that MMU/Caches and coherency are turned on 574f6ad66aSAchin Gupta */ 584f6ad66aSAchin Gupta assert(sctlr_el3 | SCTLR_M_BIT); 594f6ad66aSAchin Gupta assert(sctlr_el3 | SCTLR_C_BIT); 604f6ad66aSAchin Gupta assert(sctlr_el3 | SCTLR_I_BIT); 614f6ad66aSAchin Gupta 624f6ad66aSAchin Gupta /* Perform remaining generic architectural setup from EL3 */ 634f6ad66aSAchin Gupta bl1_arch_setup(); 644f6ad66aSAchin Gupta 654f6ad66aSAchin Gupta /* Perform platform setup in BL1. */ 664f6ad66aSAchin Gupta bl1_platform_setup(); 674f6ad66aSAchin Gupta 684f6ad66aSAchin Gupta /* Announce our arrival */ 694f6ad66aSAchin Gupta printf(FIRMWARE_WELCOME_STR); 704f6ad66aSAchin Gupta printf("Built : %s, %s\n\r", __TIME__, __DATE__); 714f6ad66aSAchin Gupta 724f6ad66aSAchin Gupta /* 734f6ad66aSAchin Gupta * Find out how much free trusted ram remains after BL1 load 744f6ad66aSAchin Gupta * & load the BL2 image at its top 754f6ad66aSAchin Gupta */ 764f6ad66aSAchin Gupta bl1_tzram_layout = bl1_get_sec_mem_layout(); 774f6ad66aSAchin Gupta bl2_base = load_image(&bl1_tzram_layout, 784f6ad66aSAchin Gupta (const char *) BL2_IMAGE_NAME, 794f6ad66aSAchin Gupta load_type, BL2_BASE); 804f6ad66aSAchin Gupta 814f6ad66aSAchin Gupta /* 824f6ad66aSAchin Gupta * Create a new layout of memory for BL2 as seen by BL1 i.e. 834f6ad66aSAchin Gupta * tell it the amount of total and free memory available. 844f6ad66aSAchin Gupta * This layout is created at the first free address visible 854f6ad66aSAchin Gupta * to BL2. BL2 will read the memory layout before using its 864f6ad66aSAchin Gupta * memory for other purposes. 874f6ad66aSAchin Gupta */ 884f6ad66aSAchin Gupta bl2_tzram_layout = (meminfo *) bl1_tzram_layout.free_base; 894f6ad66aSAchin Gupta init_bl2_mem_layout(&bl1_tzram_layout, 904f6ad66aSAchin Gupta bl2_tzram_layout, 914f6ad66aSAchin Gupta load_type, 924f6ad66aSAchin Gupta bl2_base); 934f6ad66aSAchin Gupta 944f6ad66aSAchin Gupta if (bl2_base) { 954f6ad66aSAchin Gupta bl1_arch_next_el_setup(); 964f6ad66aSAchin Gupta spsr = make_spsr(MODE_EL1, MODE_SP_ELX, MODE_RW_64); 974f6ad66aSAchin Gupta printf("Booting trusted firmware boot loader stage 2\n\r"); 984f6ad66aSAchin Gupta #if DEBUG 994f6ad66aSAchin Gupta printf("BL2 address = 0x%llx \n\r", (unsigned long long) bl2_base); 1004f6ad66aSAchin Gupta printf("BL2 cpsr = 0x%x \n\r", spsr); 1014f6ad66aSAchin Gupta printf("BL2 memory layout address = 0x%llx \n\r", 1024f6ad66aSAchin Gupta (unsigned long long) bl2_tzram_layout); 1034f6ad66aSAchin Gupta #endif 1044f6ad66aSAchin Gupta run_image(bl2_base, spsr, SECURE, bl2_tzram_layout, 0); 1054f6ad66aSAchin Gupta } 1064f6ad66aSAchin Gupta 1074f6ad66aSAchin Gupta /* 1084f6ad66aSAchin Gupta * TODO: print failure to load BL2 but also add a tzwdog timer 1094f6ad66aSAchin Gupta * which will reset the system eventually. 1104f6ad66aSAchin Gupta */ 1114f6ad66aSAchin Gupta printf("Failed to load boot loader stage 2 (BL2) firmware.\n\r"); 1124f6ad66aSAchin Gupta return; 1134f6ad66aSAchin Gupta } 1144f6ad66aSAchin Gupta 1154f6ad66aSAchin Gupta /******************************************************************************* 1164f6ad66aSAchin Gupta * Temporary function to print the fact that BL2 has done its job and BL31 is 1174f6ad66aSAchin Gupta * about to be loaded. This is needed as long as printfs cannot be used 1184f6ad66aSAchin Gupta ******************************************************************************/ 1194f6ad66aSAchin Gupta void display_boot_progress(unsigned long entrypoint, 1204f6ad66aSAchin Gupta unsigned long spsr, 1214f6ad66aSAchin Gupta unsigned long mem_layout, 1224f6ad66aSAchin Gupta unsigned long ns_image_info) 1234f6ad66aSAchin Gupta { 1244f6ad66aSAchin Gupta printf("Booting trusted firmware boot loader stage 3\n\r"); 1254f6ad66aSAchin Gupta #if DEBUG 1264f6ad66aSAchin Gupta printf("BL31 address = 0x%llx \n\r", (unsigned long long) entrypoint); 1274f6ad66aSAchin Gupta printf("BL31 cpsr = 0x%llx \n\r", (unsigned long long)spsr); 1284f6ad66aSAchin Gupta printf("BL31 memory layout address = 0x%llx \n\r", (unsigned long long)mem_layout); 1294f6ad66aSAchin Gupta printf("BL31 non-trusted image info address = 0x%llx\n\r", (unsigned long long)ns_image_info); 1304f6ad66aSAchin Gupta #endif 1314f6ad66aSAchin Gupta return; 1324f6ad66aSAchin Gupta } 133