14f6ad66aSAchin Gupta /* 2e83b0cadSDan Handley * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. 34f6ad66aSAchin Gupta * 44f6ad66aSAchin Gupta * Redistribution and use in source and binary forms, with or without 54f6ad66aSAchin Gupta * modification, are permitted provided that the following conditions are met: 64f6ad66aSAchin Gupta * 74f6ad66aSAchin Gupta * Redistributions of source code must retain the above copyright notice, this 84f6ad66aSAchin Gupta * list of conditions and the following disclaimer. 94f6ad66aSAchin Gupta * 104f6ad66aSAchin Gupta * Redistributions in binary form must reproduce the above copyright notice, 114f6ad66aSAchin Gupta * this list of conditions and the following disclaimer in the documentation 124f6ad66aSAchin Gupta * and/or other materials provided with the distribution. 134f6ad66aSAchin Gupta * 144f6ad66aSAchin Gupta * Neither the name of ARM nor the names of its contributors may be used 154f6ad66aSAchin Gupta * to endorse or promote products derived from this software without specific 164f6ad66aSAchin Gupta * prior written permission. 174f6ad66aSAchin Gupta * 184f6ad66aSAchin Gupta * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 194f6ad66aSAchin Gupta * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 204f6ad66aSAchin Gupta * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 214f6ad66aSAchin Gupta * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 224f6ad66aSAchin Gupta * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 234f6ad66aSAchin Gupta * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 244f6ad66aSAchin Gupta * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 254f6ad66aSAchin Gupta * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 264f6ad66aSAchin Gupta * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 274f6ad66aSAchin Gupta * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 284f6ad66aSAchin Gupta * POSSIBILITY OF SUCH DAMAGE. 294f6ad66aSAchin Gupta */ 304f6ad66aSAchin Gupta 3197043ac9SDan Handley #include <arch.h> 324f6ad66aSAchin Gupta #include <arch_helpers.h> 3397043ac9SDan Handley #include <assert.h> 3497043ac9SDan Handley #include <bl_common.h> 354f6ad66aSAchin Gupta #include <bl1.h> 364112bfa0SVikram Kanigiri #include <debug.h> 3797043ac9SDan Handley #include <platform.h> 38*5f0cdb05SDan Handley #include <platform_def.h> 3997043ac9SDan Handley #include <stdio.h> 405b827a8fSDan Handley #include "bl1_private.h" 414f6ad66aSAchin Gupta 424f6ad66aSAchin Gupta /******************************************************************************* 4329fb905dSVikram Kanigiri * Runs BL2 from the given entry point. It results in dropping the 4429fb905dSVikram Kanigiri * exception level 4529fb905dSVikram Kanigiri ******************************************************************************/ 464112bfa0SVikram Kanigiri static void __dead2 bl1_run_bl2(entry_point_info_t *bl2_ep) 4729fb905dSVikram Kanigiri { 4829fb905dSVikram Kanigiri bl1_arch_next_el_setup(); 4929fb905dSVikram Kanigiri 5029fb905dSVikram Kanigiri /* Tell next EL what we want done */ 5129fb905dSVikram Kanigiri bl2_ep->args.arg0 = RUN_IMAGE; 5229fb905dSVikram Kanigiri 534112bfa0SVikram Kanigiri if (GET_SECURITY_STATE(bl2_ep->h.attr) == NON_SECURE) 544112bfa0SVikram Kanigiri change_security_state(GET_SECURITY_STATE(bl2_ep->h.attr)); 5529fb905dSVikram Kanigiri 5629fb905dSVikram Kanigiri write_spsr_el3(bl2_ep->spsr); 574112bfa0SVikram Kanigiri write_elr_el3(bl2_ep->pc); 5829fb905dSVikram Kanigiri 5929fb905dSVikram Kanigiri eret(bl2_ep->args.arg0, 6029fb905dSVikram Kanigiri bl2_ep->args.arg1, 6129fb905dSVikram Kanigiri bl2_ep->args.arg2, 6229fb905dSVikram Kanigiri bl2_ep->args.arg3, 6329fb905dSVikram Kanigiri bl2_ep->args.arg4, 6429fb905dSVikram Kanigiri bl2_ep->args.arg5, 6529fb905dSVikram Kanigiri bl2_ep->args.arg6, 6629fb905dSVikram Kanigiri bl2_ep->args.arg7); 6729fb905dSVikram Kanigiri } 6829fb905dSVikram Kanigiri 6929fb905dSVikram Kanigiri 7029fb905dSVikram Kanigiri /******************************************************************************* 714f6ad66aSAchin Gupta * Function to perform late architectural and platform specific initialization. 724f6ad66aSAchin Gupta * It also locates and loads the BL2 raw binary image in the trusted DRAM. Only 734f6ad66aSAchin Gupta * called by the primary cpu after a cold boot. 744f6ad66aSAchin Gupta * TODO: Add support for alternative image load mechanism e.g using virtio/elf 754f6ad66aSAchin Gupta * loader etc. 764f6ad66aSAchin Gupta ******************************************************************************/ 774f6ad66aSAchin Gupta void bl1_main(void) 784f6ad66aSAchin Gupta { 7940a6f647SJames Morrissey #if DEBUG 806ba0b6d6SVikram Kanigiri unsigned long sctlr_el3 = read_sctlr_el3(); 8140a6f647SJames Morrissey #endif 8229fb905dSVikram Kanigiri unsigned int load_type = TOP_LOAD; 834112bfa0SVikram Kanigiri image_info_t bl2_image_info = { {0} }; 844112bfa0SVikram Kanigiri entry_point_info_t bl2_ep = { {0} }; 85fb037bfbSDan Handley meminfo_t *bl1_tzram_layout; 86fb037bfbSDan Handley meminfo_t *bl2_tzram_layout = 0x0; 874112bfa0SVikram Kanigiri int err; 884f6ad66aSAchin Gupta 894f6ad66aSAchin Gupta /* 904f6ad66aSAchin Gupta * Ensure that MMU/Caches and coherency are turned on 914f6ad66aSAchin Gupta */ 924f6ad66aSAchin Gupta assert(sctlr_el3 | SCTLR_M_BIT); 934f6ad66aSAchin Gupta assert(sctlr_el3 | SCTLR_C_BIT); 944f6ad66aSAchin Gupta assert(sctlr_el3 | SCTLR_I_BIT); 954f6ad66aSAchin Gupta 964f6ad66aSAchin Gupta /* Perform remaining generic architectural setup from EL3 */ 974f6ad66aSAchin Gupta bl1_arch_setup(); 984f6ad66aSAchin Gupta 994f6ad66aSAchin Gupta /* Perform platform setup in BL1. */ 1004f6ad66aSAchin Gupta bl1_platform_setup(); 1014f6ad66aSAchin Gupta 1024f6ad66aSAchin Gupta /* Announce our arrival */ 1034f6ad66aSAchin Gupta printf(FIRMWARE_WELCOME_STR); 104fb052462SJon Medhurst printf("%s\n\r", build_message); 1054f6ad66aSAchin Gupta 1064112bfa0SVikram Kanigiri SET_PARAM_HEAD(&bl2_image_info, PARAM_IMAGE_BINARY, VERSION_1, 0); 1074112bfa0SVikram Kanigiri SET_PARAM_HEAD(&bl2_ep, PARAM_EP, VERSION_1, 0); 1084112bfa0SVikram Kanigiri 1094f6ad66aSAchin Gupta /* 1104f6ad66aSAchin Gupta * Find out how much free trusted ram remains after BL1 load 1114f6ad66aSAchin Gupta * & load the BL2 image at its top 1124f6ad66aSAchin Gupta */ 113ee12f6f7SSandrine Bailleux bl1_tzram_layout = bl1_plat_sec_mem_layout(); 1144112bfa0SVikram Kanigiri err = load_image(bl1_tzram_layout, 1154f6ad66aSAchin Gupta (const char *) BL2_IMAGE_NAME, 1164112bfa0SVikram Kanigiri load_type, 1174112bfa0SVikram Kanigiri BL2_BASE, 1184112bfa0SVikram Kanigiri &bl2_image_info, 1194112bfa0SVikram Kanigiri &bl2_ep); 1204112bfa0SVikram Kanigiri if (err) { 1214112bfa0SVikram Kanigiri /* 1224112bfa0SVikram Kanigiri * TODO: print failure to load BL2 but also add a tzwdog timer 1234112bfa0SVikram Kanigiri * which will reset the system eventually. 1244112bfa0SVikram Kanigiri */ 1254112bfa0SVikram Kanigiri printf("Failed to load boot loader stage 2 (BL2) firmware.\n"); 1264112bfa0SVikram Kanigiri panic(); 1274112bfa0SVikram Kanigiri } 1284f6ad66aSAchin Gupta /* 1294f6ad66aSAchin Gupta * Create a new layout of memory for BL2 as seen by BL1 i.e. 1304f6ad66aSAchin Gupta * tell it the amount of total and free memory available. 1314f6ad66aSAchin Gupta * This layout is created at the first free address visible 1324f6ad66aSAchin Gupta * to BL2. BL2 will read the memory layout before using its 1334f6ad66aSAchin Gupta * memory for other purposes. 1344f6ad66aSAchin Gupta */ 135fb037bfbSDan Handley bl2_tzram_layout = (meminfo_t *) bl1_tzram_layout->free_base; 136ee12f6f7SSandrine Bailleux init_bl2_mem_layout(bl1_tzram_layout, 1374f6ad66aSAchin Gupta bl2_tzram_layout, 1384f6ad66aSAchin Gupta load_type, 1394112bfa0SVikram Kanigiri bl2_image_info.image_base); 1404f6ad66aSAchin Gupta 1414112bfa0SVikram Kanigiri bl1_plat_set_bl2_ep_info(&bl2_image_info, &bl2_ep); 14229fb905dSVikram Kanigiri bl2_ep.args.arg1 = (unsigned long)bl2_tzram_layout; 1434112bfa0SVikram Kanigiri printf("Booting trusted firmware boot loader stage 2\n"); 1444f6ad66aSAchin Gupta #if DEBUG 1454112bfa0SVikram Kanigiri printf("BL2 address = 0x%llx\n", 1464112bfa0SVikram Kanigiri (unsigned long long) bl2_ep.pc); 1474112bfa0SVikram Kanigiri printf("BL2 cpsr = 0x%x\n", bl2_ep.spsr); 1484112bfa0SVikram Kanigiri printf("BL2 memory layout address = 0x%llx\n", 1494f6ad66aSAchin Gupta (unsigned long long) bl2_tzram_layout); 1504f6ad66aSAchin Gupta #endif 15129fb905dSVikram Kanigiri bl1_run_bl2(&bl2_ep); 1524f6ad66aSAchin Gupta 1534f6ad66aSAchin Gupta return; 1544f6ad66aSAchin Gupta } 1554f6ad66aSAchin Gupta 1564f6ad66aSAchin Gupta /******************************************************************************* 1574f6ad66aSAchin Gupta * Temporary function to print the fact that BL2 has done its job and BL31 is 1584f6ad66aSAchin Gupta * about to be loaded. This is needed as long as printfs cannot be used 1594f6ad66aSAchin Gupta ******************************************************************************/ 1604112bfa0SVikram Kanigiri void display_boot_progress(entry_point_info_t *bl31_ep_info) 1614f6ad66aSAchin Gupta { 1624f6ad66aSAchin Gupta printf("Booting trusted firmware boot loader stage 3\n\r"); 1634f6ad66aSAchin Gupta #if DEBUG 1644112bfa0SVikram Kanigiri printf("BL31 address = 0x%llx\n", (unsigned long long)bl31_ep_info->pc); 1654112bfa0SVikram Kanigiri printf("BL31 cpsr = 0x%llx\n", (unsigned long long)bl31_ep_info->spsr); 1664112bfa0SVikram Kanigiri printf("BL31 params address = 0x%llx\n", 16729fb905dSVikram Kanigiri (unsigned long long)bl31_ep_info->args.arg0); 1684112bfa0SVikram Kanigiri printf("BL31 plat params address = 0x%llx\n", 1694112bfa0SVikram Kanigiri (unsigned long long)bl31_ep_info->args.arg1); 1704f6ad66aSAchin Gupta #endif 1714f6ad66aSAchin Gupta return; 1724f6ad66aSAchin Gupta } 173