1*4f6ad66aSAchin Gupta /* 2*4f6ad66aSAchin Gupta * Copyright (c) 2013, ARM Limited. All rights reserved. 3*4f6ad66aSAchin Gupta * 4*4f6ad66aSAchin Gupta * Redistribution and use in source and binary forms, with or without 5*4f6ad66aSAchin Gupta * modification, are permitted provided that the following conditions are met: 6*4f6ad66aSAchin Gupta * 7*4f6ad66aSAchin Gupta * Redistributions of source code must retain the above copyright notice, this 8*4f6ad66aSAchin Gupta * list of conditions and the following disclaimer. 9*4f6ad66aSAchin Gupta * 10*4f6ad66aSAchin Gupta * Redistributions in binary form must reproduce the above copyright notice, 11*4f6ad66aSAchin Gupta * this list of conditions and the following disclaimer in the documentation 12*4f6ad66aSAchin Gupta * and/or other materials provided with the distribution. 13*4f6ad66aSAchin Gupta * 14*4f6ad66aSAchin Gupta * Neither the name of ARM nor the names of its contributors may be used 15*4f6ad66aSAchin Gupta * to endorse or promote products derived from this software without specific 16*4f6ad66aSAchin Gupta * prior written permission. 17*4f6ad66aSAchin Gupta * 18*4f6ad66aSAchin Gupta * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19*4f6ad66aSAchin Gupta * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20*4f6ad66aSAchin Gupta * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21*4f6ad66aSAchin Gupta * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22*4f6ad66aSAchin Gupta * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23*4f6ad66aSAchin Gupta * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24*4f6ad66aSAchin Gupta * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25*4f6ad66aSAchin Gupta * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26*4f6ad66aSAchin Gupta * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27*4f6ad66aSAchin Gupta * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28*4f6ad66aSAchin Gupta * POSSIBILITY OF SUCH DAMAGE. 29*4f6ad66aSAchin Gupta */ 30*4f6ad66aSAchin Gupta 31*4f6ad66aSAchin Gupta #include <stdio.h> 32*4f6ad66aSAchin Gupta #include <string.h> 33*4f6ad66aSAchin Gupta #include <assert.h> 34*4f6ad66aSAchin Gupta #include <arch_helpers.h> 35*4f6ad66aSAchin Gupta #include <platform.h> 36*4f6ad66aSAchin Gupta #include <semihosting.h> 37*4f6ad66aSAchin Gupta #include <bl1.h> 38*4f6ad66aSAchin Gupta 39*4f6ad66aSAchin Gupta void bl1_arch_next_el_setup(void); 40*4f6ad66aSAchin Gupta 41*4f6ad66aSAchin Gupta /******************************************************************************* 42*4f6ad66aSAchin Gupta * Function to perform late architectural and platform specific initialization. 43*4f6ad66aSAchin Gupta * It also locates and loads the BL2 raw binary image in the trusted DRAM. Only 44*4f6ad66aSAchin Gupta * called by the primary cpu after a cold boot. 45*4f6ad66aSAchin Gupta * TODO: Add support for alternative image load mechanism e.g using virtio/elf 46*4f6ad66aSAchin Gupta * loader etc. 47*4f6ad66aSAchin Gupta ******************************************************************************/ 48*4f6ad66aSAchin Gupta void bl1_main(void) 49*4f6ad66aSAchin Gupta { 50*4f6ad66aSAchin Gupta unsigned long sctlr_el3 = read_sctlr(); 51*4f6ad66aSAchin Gupta unsigned long bl2_base; 52*4f6ad66aSAchin Gupta unsigned int load_type = TOP_LOAD, spsr; 53*4f6ad66aSAchin Gupta meminfo bl1_tzram_layout, *bl2_tzram_layout = 0x0; 54*4f6ad66aSAchin Gupta 55*4f6ad66aSAchin Gupta /* 56*4f6ad66aSAchin Gupta * Ensure that MMU/Caches and coherency are turned on 57*4f6ad66aSAchin Gupta */ 58*4f6ad66aSAchin Gupta assert(sctlr_el3 | SCTLR_M_BIT); 59*4f6ad66aSAchin Gupta assert(sctlr_el3 | SCTLR_C_BIT); 60*4f6ad66aSAchin Gupta assert(sctlr_el3 | SCTLR_I_BIT); 61*4f6ad66aSAchin Gupta 62*4f6ad66aSAchin Gupta /* Perform remaining generic architectural setup from EL3 */ 63*4f6ad66aSAchin Gupta bl1_arch_setup(); 64*4f6ad66aSAchin Gupta 65*4f6ad66aSAchin Gupta /* Perform platform setup in BL1. */ 66*4f6ad66aSAchin Gupta bl1_platform_setup(); 67*4f6ad66aSAchin Gupta 68*4f6ad66aSAchin Gupta /* Announce our arrival */ 69*4f6ad66aSAchin Gupta printf(FIRMWARE_WELCOME_STR); 70*4f6ad66aSAchin Gupta printf("Built : %s, %s\n\r", __TIME__, __DATE__); 71*4f6ad66aSAchin Gupta 72*4f6ad66aSAchin Gupta /* 73*4f6ad66aSAchin Gupta * Find out how much free trusted ram remains after BL1 load 74*4f6ad66aSAchin Gupta * & load the BL2 image at its top 75*4f6ad66aSAchin Gupta */ 76*4f6ad66aSAchin Gupta bl1_tzram_layout = bl1_get_sec_mem_layout(); 77*4f6ad66aSAchin Gupta bl2_base = load_image(&bl1_tzram_layout, 78*4f6ad66aSAchin Gupta (const char *) BL2_IMAGE_NAME, 79*4f6ad66aSAchin Gupta load_type, BL2_BASE); 80*4f6ad66aSAchin Gupta 81*4f6ad66aSAchin Gupta /* 82*4f6ad66aSAchin Gupta * Create a new layout of memory for BL2 as seen by BL1 i.e. 83*4f6ad66aSAchin Gupta * tell it the amount of total and free memory available. 84*4f6ad66aSAchin Gupta * This layout is created at the first free address visible 85*4f6ad66aSAchin Gupta * to BL2. BL2 will read the memory layout before using its 86*4f6ad66aSAchin Gupta * memory for other purposes. 87*4f6ad66aSAchin Gupta */ 88*4f6ad66aSAchin Gupta bl2_tzram_layout = (meminfo *) bl1_tzram_layout.free_base; 89*4f6ad66aSAchin Gupta init_bl2_mem_layout(&bl1_tzram_layout, 90*4f6ad66aSAchin Gupta bl2_tzram_layout, 91*4f6ad66aSAchin Gupta load_type, 92*4f6ad66aSAchin Gupta bl2_base); 93*4f6ad66aSAchin Gupta 94*4f6ad66aSAchin Gupta if (bl2_base) { 95*4f6ad66aSAchin Gupta bl1_arch_next_el_setup(); 96*4f6ad66aSAchin Gupta spsr = make_spsr(MODE_EL1, MODE_SP_ELX, MODE_RW_64); 97*4f6ad66aSAchin Gupta printf("Booting trusted firmware boot loader stage 2\n\r"); 98*4f6ad66aSAchin Gupta #if DEBUG 99*4f6ad66aSAchin Gupta printf("BL2 address = 0x%llx \n\r", (unsigned long long) bl2_base); 100*4f6ad66aSAchin Gupta printf("BL2 cpsr = 0x%x \n\r", spsr); 101*4f6ad66aSAchin Gupta printf("BL2 memory layout address = 0x%llx \n\r", 102*4f6ad66aSAchin Gupta (unsigned long long) bl2_tzram_layout); 103*4f6ad66aSAchin Gupta #endif 104*4f6ad66aSAchin Gupta run_image(bl2_base, spsr, SECURE, bl2_tzram_layout, 0); 105*4f6ad66aSAchin Gupta } 106*4f6ad66aSAchin Gupta 107*4f6ad66aSAchin Gupta /* 108*4f6ad66aSAchin Gupta * TODO: print failure to load BL2 but also add a tzwdog timer 109*4f6ad66aSAchin Gupta * which will reset the system eventually. 110*4f6ad66aSAchin Gupta */ 111*4f6ad66aSAchin Gupta printf("Failed to load boot loader stage 2 (BL2) firmware.\n\r"); 112*4f6ad66aSAchin Gupta return; 113*4f6ad66aSAchin Gupta } 114*4f6ad66aSAchin Gupta 115*4f6ad66aSAchin Gupta /******************************************************************************* 116*4f6ad66aSAchin Gupta * Temporary function to print the fact that BL2 has done its job and BL31 is 117*4f6ad66aSAchin Gupta * about to be loaded. This is needed as long as printfs cannot be used 118*4f6ad66aSAchin Gupta ******************************************************************************/ 119*4f6ad66aSAchin Gupta void display_boot_progress(unsigned long entrypoint, 120*4f6ad66aSAchin Gupta unsigned long spsr, 121*4f6ad66aSAchin Gupta unsigned long mem_layout, 122*4f6ad66aSAchin Gupta unsigned long ns_image_info) 123*4f6ad66aSAchin Gupta { 124*4f6ad66aSAchin Gupta printf("Booting trusted firmware boot loader stage 3\n\r"); 125*4f6ad66aSAchin Gupta #if DEBUG 126*4f6ad66aSAchin Gupta printf("BL31 address = 0x%llx \n\r", (unsigned long long) entrypoint); 127*4f6ad66aSAchin Gupta printf("BL31 cpsr = 0x%llx \n\r", (unsigned long long)spsr); 128*4f6ad66aSAchin Gupta printf("BL31 memory layout address = 0x%llx \n\r", (unsigned long long)mem_layout); 129*4f6ad66aSAchin Gupta printf("BL31 non-trusted image info address = 0x%llx\n\r", (unsigned long long)ns_image_info); 130*4f6ad66aSAchin Gupta #endif 131*4f6ad66aSAchin Gupta return; 132*4f6ad66aSAchin Gupta } 133