1/* 2 * Copyright (c) 2013-2025, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7#include <arch.h> 8#include <asm_macros.S> 9#include <bl1/bl1.h> 10#include <common/bl_common.h> 11#include <context.h> 12 13/* ----------------------------------------------------------------------------- 14 * Very simple stackless exception handlers used by BL1. 15 * ----------------------------------------------------------------------------- 16 */ 17 .globl bl1_exceptions 18 19vector_base bl1_exceptions 20 21 /* ----------------------------------------------------- 22 * Current EL with SP0 : 0x0 - 0x200 23 * ----------------------------------------------------- 24 */ 25vector_entry SynchronousExceptionSP0 26 mov x0, #SYNC_EXCEPTION_SP_EL0 27 bl plat_report_exception 28 no_ret plat_panic_handler 29end_vector_entry SynchronousExceptionSP0 30 31vector_entry IrqSP0 32 mov x0, #IRQ_SP_EL0 33 bl plat_report_exception 34 no_ret plat_panic_handler 35end_vector_entry IrqSP0 36 37vector_entry FiqSP0 38 mov x0, #FIQ_SP_EL0 39 bl plat_report_exception 40 no_ret plat_panic_handler 41end_vector_entry FiqSP0 42 43vector_entry SErrorSP0 44 mov x0, #SERROR_SP_EL0 45 bl plat_report_exception 46 no_ret plat_panic_handler 47end_vector_entry SErrorSP0 48 49 /* ----------------------------------------------------- 50 * Current EL with SPx: 0x200 - 0x400 51 * ----------------------------------------------------- 52 */ 53vector_entry SynchronousExceptionSPx 54 mov x0, #SYNC_EXCEPTION_SP_ELX 55 bl plat_report_exception 56 no_ret plat_panic_handler 57end_vector_entry SynchronousExceptionSPx 58 59vector_entry IrqSPx 60 mov x0, #IRQ_SP_ELX 61 bl plat_report_exception 62 no_ret plat_panic_handler 63end_vector_entry IrqSPx 64 65vector_entry FiqSPx 66 mov x0, #FIQ_SP_ELX 67 bl plat_report_exception 68 no_ret plat_panic_handler 69end_vector_entry FiqSPx 70 71vector_entry SErrorSPx 72 mov x0, #SERROR_SP_ELX 73 bl plat_report_exception 74 no_ret plat_panic_handler 75end_vector_entry SErrorSPx 76 77 /* ----------------------------------------------------- 78 * Lower EL using AArch64 : 0x400 - 0x600 79 * ----------------------------------------------------- 80 */ 81vector_entry SynchronousExceptionA64 82 /* Enable the SError interrupt */ 83 msr daifclr, #DAIF_ABT_BIT 84 85 str x30, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_LR] 86 87 /* Expect only SMC exceptions */ 88 mrs x30, esr_el3 89 ubfx x30, x30, #ESR_EC_SHIFT, #ESR_EC_LENGTH 90 cmp x30, #EC_AARCH64_SMC 91 b.ne unexpected_sync_exception 92 93 b smc_handler64 94end_vector_entry SynchronousExceptionA64 95 96vector_entry IrqA64 97 mov x0, #IRQ_AARCH64 98 bl plat_report_exception 99 no_ret plat_panic_handler 100end_vector_entry IrqA64 101 102vector_entry FiqA64 103 mov x0, #FIQ_AARCH64 104 bl plat_report_exception 105 no_ret plat_panic_handler 106end_vector_entry FiqA64 107 108vector_entry SErrorA64 109 mov x0, #SERROR_AARCH64 110 bl plat_report_exception 111 no_ret plat_panic_handler 112end_vector_entry SErrorA64 113 114 /* ----------------------------------------------------- 115 * Lower EL using AArch32 : 0x600 - 0x800 116 * ----------------------------------------------------- 117 */ 118vector_entry SynchronousExceptionA32 119 mov x0, #SYNC_EXCEPTION_AARCH32 120 bl plat_report_exception 121 no_ret plat_panic_handler 122end_vector_entry SynchronousExceptionA32 123 124vector_entry IrqA32 125 mov x0, #IRQ_AARCH32 126 bl plat_report_exception 127 no_ret plat_panic_handler 128end_vector_entry IrqA32 129 130vector_entry FiqA32 131 mov x0, #FIQ_AARCH32 132 bl plat_report_exception 133 no_ret plat_panic_handler 134end_vector_entry FiqA32 135 136vector_entry SErrorA32 137 mov x0, #SERROR_AARCH32 138 bl plat_report_exception 139 no_ret plat_panic_handler 140end_vector_entry SErrorA32 141 142 143func unexpected_sync_exception 144 mov x0, #SYNC_EXCEPTION_AARCH64 145 bl plat_report_exception 146 no_ret plat_panic_handler 147endfunc unexpected_sync_exception 148 149func smc_handler64 150 /* ---------------------------------------------- 151 * Detect if this is a RUN_IMAGE or other SMC. 152 * ---------------------------------------------- 153 */ 154 mov x30, #BL1_SMC_RUN_IMAGE 155 cmp x30, x0 156 b.ne smc_handler 157 158 /* ------------------------------------------------ 159 * Make sure only Secure world reaches here. 160 * ------------------------------------------------ 161 */ 162 mrs x30, scr_el3 163 tst x30, #SCR_NS_BIT 164 b.ne unexpected_sync_exception 165 166 /* ---------------------------------------------- 167 * Handling RUN_IMAGE SMC. First switch back to 168 * SP_EL0 for the C runtime stack. 169 * ---------------------------------------------- 170 */ 171 ldr x30, [sp, #CTX_EL3STATE_OFFSET + CTX_RUNTIME_SP] 172 msr spsel, #MODE_SP_EL0 173 mov sp, x30 174 175 /* --------------------------------------------------------------------- 176 * Pass EL3 control to next BL image. 177 * Here it expects X1 with the address of a entry_point_info_t 178 * structure describing the next BL image entrypoint. 179 * --------------------------------------------------------------------- 180 */ 181 mov x20, x1 182 183 mov x0, x20 184 bl bl1_print_next_bl_ep_info 185 186 ldp x0, x1, [x20, #ENTRY_POINT_INFO_PC_OFFSET] 187 msr elr_el3, x0 188 msr spsr_el3, x1 189 ubfx x0, x1, #MODE_EL_SHIFT, #2 190 cmp x0, #MODE_EL3 191 b.ne unexpected_sync_exception 192 193 bl disable_mmu_icache_el3 194 tlbi alle3 195 dsb ish /* ERET implies ISB, so it is not needed here */ 196 197#if SPIN_ON_BL1_EXIT 198 bl print_debug_loop_message 199debug_loop: 200 b debug_loop 201#endif 202 203 mov x0, x20 204 bl bl1_plat_prepare_exit 205 206 ldp x6, x7, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x30)] 207 ldp x4, x5, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x20)] 208 ldp x2, x3, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x10)] 209 ldp x0, x1, [x20, #(ENTRY_POINT_INFO_ARGS_OFFSET + 0x0)] 210 exception_return 211 212smc_handler: 213 bl prepare_el3_entry 214 215 /* ----------------------------------------------------- 216 * Go to BL1 SMC handler. 217 * ----------------------------------------------------- 218 */ 219 bl bl1_smc_wrapper_aarch64 220 221 /* ----------------------------------------------------- 222 * Do the transition to next BL image. 223 * ----------------------------------------------------- 224 */ 225 b el3_exit 226endfunc smc_handler64 227