14f6ad66aSAchin Gupta/* 252010cc7SSandrine Bailleux * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved. 34f6ad66aSAchin Gupta * 44f6ad66aSAchin Gupta * Redistribution and use in source and binary forms, with or without 54f6ad66aSAchin Gupta * modification, are permitted provided that the following conditions are met: 64f6ad66aSAchin Gupta * 74f6ad66aSAchin Gupta * Redistributions of source code must retain the above copyright notice, this 84f6ad66aSAchin Gupta * list of conditions and the following disclaimer. 94f6ad66aSAchin Gupta * 104f6ad66aSAchin Gupta * Redistributions in binary form must reproduce the above copyright notice, 114f6ad66aSAchin Gupta * this list of conditions and the following disclaimer in the documentation 124f6ad66aSAchin Gupta * and/or other materials provided with the distribution. 134f6ad66aSAchin Gupta * 144f6ad66aSAchin Gupta * Neither the name of ARM nor the names of its contributors may be used 154f6ad66aSAchin Gupta * to endorse or promote products derived from this software without specific 164f6ad66aSAchin Gupta * prior written permission. 174f6ad66aSAchin Gupta * 184f6ad66aSAchin Gupta * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 194f6ad66aSAchin Gupta * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 204f6ad66aSAchin Gupta * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 214f6ad66aSAchin Gupta * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 224f6ad66aSAchin Gupta * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 234f6ad66aSAchin Gupta * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 244f6ad66aSAchin Gupta * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 254f6ad66aSAchin Gupta * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 264f6ad66aSAchin Gupta * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 274f6ad66aSAchin Gupta * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 284f6ad66aSAchin Gupta * POSSIBILITY OF SUCH DAMAGE. 294f6ad66aSAchin Gupta */ 304f6ad66aSAchin Gupta 31c10bd2ceSSandrine Bailleux#include <arch.h> 3252010cc7SSandrine Bailleux#include <el3_common_macros.S> 334f6ad66aSAchin Gupta 349f98aa1aSJeenu Viswambharan .globl bl1_entrypoint 354f6ad66aSAchin Gupta 364f6ad66aSAchin Gupta 374f6ad66aSAchin Gupta /* ----------------------------------------------------- 389f98aa1aSJeenu Viswambharan * bl1_entrypoint() is the entry point into the trusted 394f6ad66aSAchin Gupta * firmware code when a cpu is released from warm or 404f6ad66aSAchin Gupta * cold reset. 414f6ad66aSAchin Gupta * ----------------------------------------------------- 424f6ad66aSAchin Gupta */ 434f6ad66aSAchin Gupta 440a30cf54SAndrew Thoelkefunc bl1_entrypoint 45bf031bbaSSandrine Bailleux /* --------------------------------------------------------------------- 46bf031bbaSSandrine Bailleux * If the reset address is programmable then bl1_entrypoint() is 47bf031bbaSSandrine Bailleux * executed only on the cold boot path. Therefore, we can skip the warm 48bf031bbaSSandrine Bailleux * boot mailbox mechanism. 49bf031bbaSSandrine Bailleux * --------------------------------------------------------------------- 50bf031bbaSSandrine Bailleux */ 5152010cc7SSandrine Bailleux el3_entrypoint_common \ 5252010cc7SSandrine Bailleux _set_endian=1 \ 53bf031bbaSSandrine Bailleux _warm_boot_mailbox=!PROGRAMMABLE_RESET_ADDRESS \ 54*a9bec67dSSandrine Bailleux _secondary_cold_boot=!COLD_BOOT_SINGLE_CPU \ 5552010cc7SSandrine Bailleux _init_memory=1 \ 5652010cc7SSandrine Bailleux _init_c_runtime=1 \ 5752010cc7SSandrine Bailleux _exception_vectors=bl1_exceptions 584f6ad66aSAchin Gupta 594f6ad66aSAchin Gupta /* --------------------------------------------- 60dbad1bacSVikram Kanigiri * Architectural init. can be generic e.g. 61dbad1bacSVikram Kanigiri * enabling stack alignment and platform spec- 62dbad1bacSVikram Kanigiri * ific e.g. MMU & page table setup as per the 63dbad1bacSVikram Kanigiri * platform memory map. Perform the latter here 64dbad1bacSVikram Kanigiri * and the former in bl1_main. 654f6ad66aSAchin Gupta * --------------------------------------------- 664f6ad66aSAchin Gupta */ 67dbad1bacSVikram Kanigiri bl bl1_early_platform_setup 68dbad1bacSVikram Kanigiri bl bl1_plat_arch_setup 69dbad1bacSVikram Kanigiri 70dbad1bacSVikram Kanigiri /* -------------------------------------------------- 71dbad1bacSVikram Kanigiri * Initialize platform and jump to our c-entry point 72dbad1bacSVikram Kanigiri * for this type of reset. Panic if it returns 73dbad1bacSVikram Kanigiri * -------------------------------------------------- 74dbad1bacSVikram Kanigiri */ 75dbad1bacSVikram Kanigiri bl bl1_main 76dbad1bacSVikram Kanigiripanic: 77dbad1bacSVikram Kanigiri b panic 788b779620SKévin Petitendfunc bl1_entrypoint 79