1 /* 2 * Copyright (c) 2015-2025, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 9 #include <arch_helpers.h> 10 #include <context.h> 11 #include <common/debug.h> 12 #include <lib/el3_runtime/context_mgmt.h> 13 #include <plat/common/platform.h> 14 15 #include "../bl1_private.h" 16 17 entry_point_info_t *bl2_ep_info; 18 19 /* 20 * Following array will be used for context management. 21 * There are 2 instances, for the Secure and Non-Secure contexts. 22 */ 23 static cpu_context_t bl1_cpu_context[2]; 24 25 void *cm_get_context(size_t security_state) 26 { 27 assert(sec_state_is_valid(security_state)); 28 return &bl1_cpu_context[security_state]; 29 } 30 31 #if ENABLE_RME 32 /******************************************************************************* 33 * This function prepares the entry point information to run BL2 in Root world, 34 * i.e. EL3, for the case when FEAT_RME is enabled. 35 ******************************************************************************/ 36 void bl1_prepare_next_image(unsigned int image_id) 37 { 38 image_desc_t *bl2_desc; 39 40 assert(image_id == BL2_IMAGE_ID); 41 42 /* Get the image descriptor. */ 43 bl2_desc = bl1_plat_get_image_desc(BL2_IMAGE_ID); 44 assert(bl2_desc != NULL); 45 46 /* Get the entry point info. */ 47 bl2_ep_info = &bl2_desc->ep_info; 48 49 bl2_ep_info->spsr = (uint32_t)SPSR_64(MODE_EL3, MODE_SP_ELX, 50 DISABLE_ALL_EXCEPTIONS); 51 52 /* 53 * Flush cache since bl2_ep_info is accessed after MMU is disabled 54 * before jumping to BL2. 55 */ 56 flush_dcache_range((uintptr_t)bl2_ep_info, sizeof(entry_point_info_t)); 57 58 /* Indicate that image is in execution state. */ 59 bl2_desc->state = IMAGE_STATE_EXECUTED; 60 61 /* Print debug info and flush the console before running BL2. */ 62 print_entry_point_info(bl2_ep_info); 63 } 64 #else 65 /******************************************************************************* 66 * This function prepares the context for Secure/Normal world images. 67 * Normal world images are transitioned to EL2(if supported) else EL1. 68 ******************************************************************************/ 69 void bl1_prepare_next_image(unsigned int image_id) 70 { 71 unsigned int security_state, mode = MODE_EL1; 72 image_desc_t *desc; 73 entry_point_info_t *next_bl_ep; 74 75 #if CTX_INCLUDE_AARCH32_REGS 76 /* 77 * Ensure that the build flag to save AArch32 system registers in CPU 78 * context is not set for AArch64-only platforms. 79 */ 80 if (el_implemented(1) == EL_IMPL_A64ONLY) { 81 ERROR("EL1 supports AArch64-only. Please set build flag " 82 "CTX_INCLUDE_AARCH32_REGS = 0\n"); 83 panic(); 84 } 85 #endif 86 87 /* Get the image descriptor. */ 88 desc = bl1_plat_get_image_desc(image_id); 89 assert(desc != NULL); 90 91 /* Get the entry point info. */ 92 next_bl_ep = &desc->ep_info; 93 94 /* Get the image security state. */ 95 security_state = GET_SECURITY_STATE(next_bl_ep->h.attr); 96 97 /* Prepare the SPSR for the next BL image. */ 98 if ((security_state != SECURE) && (el_implemented(2) != EL_IMPL_NONE)) { 99 mode = MODE_EL2; 100 } 101 102 next_bl_ep->spsr = (uint32_t)SPSR_64((uint64_t) mode, 103 (uint64_t)MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); 104 105 /* Allow platform to make change */ 106 bl1_plat_set_ep_info(image_id, next_bl_ep); 107 108 /* Prepare the context for the next BL image. */ 109 cm_init_my_context(next_bl_ep); 110 cm_prepare_el3_exit(security_state); 111 112 /* Indicate that image is in execution state. */ 113 desc->state = IMAGE_STATE_EXECUTED; 114 115 print_entry_point_info(next_bl_ep); 116 } 117 #endif /* ENABLE_RME */ 118