1f3b4914bSYatharth Kochar /* 2a0fee747SAntonio Nino Diaz * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. 3f3b4914bSYatharth Kochar * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 5f3b4914bSYatharth Kochar */ 6f3b4914bSYatharth Kochar 7f3b4914bSYatharth Kochar #include <assert.h> 809d40e0eSAntonio Nino Diaz 909d40e0eSAntonio Nino Diaz #include <arch_helpers.h> 10f3b4914bSYatharth Kochar #include <context.h> 1109d40e0eSAntonio Nino Diaz #include <common/debug.h> 1209d40e0eSAntonio Nino Diaz #include <lib/el3_runtime/context_mgmt.h> 1309d40e0eSAntonio Nino Diaz #include <plat/common/platform.h> 1409d40e0eSAntonio Nino Diaz 15c04d59cfSEtienne Carriere #include "../bl1_private.h" 16f3b4914bSYatharth Kochar 17f3b4914bSYatharth Kochar /* 18f3b4914bSYatharth Kochar * Following array will be used for context management. 19f3b4914bSYatharth Kochar * There are 2 instances, for the Secure and Non-Secure contexts. 20f3b4914bSYatharth Kochar */ 21f3b4914bSYatharth Kochar static cpu_context_t bl1_cpu_context[2]; 22f3b4914bSYatharth Kochar 23f3b4914bSYatharth Kochar /* Following contains the cpu context pointers. */ 24f3b4914bSYatharth Kochar static void *bl1_cpu_context_ptr[2]; 25f3b4914bSYatharth Kochar 26f3b4914bSYatharth Kochar 27f3b4914bSYatharth Kochar void *cm_get_context(uint32_t security_state) 28f3b4914bSYatharth Kochar { 29f3b4914bSYatharth Kochar assert(sec_state_is_valid(security_state)); 30f3b4914bSYatharth Kochar return bl1_cpu_context_ptr[security_state]; 31f3b4914bSYatharth Kochar } 32f3b4914bSYatharth Kochar 33f3b4914bSYatharth Kochar void cm_set_context(void *context, uint32_t security_state) 34f3b4914bSYatharth Kochar { 35f3b4914bSYatharth Kochar assert(sec_state_is_valid(security_state)); 36f3b4914bSYatharth Kochar bl1_cpu_context_ptr[security_state] = context; 37f3b4914bSYatharth Kochar } 38f3b4914bSYatharth Kochar 39f3b4914bSYatharth Kochar /******************************************************************************* 40f3b4914bSYatharth Kochar * This function prepares the context for Secure/Normal world images. 41f3b4914bSYatharth Kochar * Normal world images are transitioned to EL2(if supported) else EL1. 42f3b4914bSYatharth Kochar ******************************************************************************/ 43f3b4914bSYatharth Kochar void bl1_prepare_next_image(unsigned int image_id) 44f3b4914bSYatharth Kochar { 45*d200f230SJohn Tsichritzis unsigned int security_state, mode = MODE_EL1; 46f3b4914bSYatharth Kochar image_desc_t *image_desc; 47f3b4914bSYatharth Kochar entry_point_info_t *next_bl_ep; 48f3b4914bSYatharth Kochar 49f3b4914bSYatharth Kochar #if CTX_INCLUDE_AARCH32_REGS 50f3b4914bSYatharth Kochar /* 51f3b4914bSYatharth Kochar * Ensure that the build flag to save AArch32 system registers in CPU 52f3b4914bSYatharth Kochar * context is not set for AArch64-only platforms. 53f3b4914bSYatharth Kochar */ 54a0fee747SAntonio Nino Diaz if (el_implemented(1) == EL_IMPL_A64ONLY) { 55f3b4914bSYatharth Kochar ERROR("EL1 supports AArch64-only. Please set build flag " 56a0fee747SAntonio Nino Diaz "CTX_INCLUDE_AARCH32_REGS = 0\n"); 57f3b4914bSYatharth Kochar panic(); 58f3b4914bSYatharth Kochar } 59f3b4914bSYatharth Kochar #endif 60f3b4914bSYatharth Kochar 61f3b4914bSYatharth Kochar /* Get the image descriptor. */ 62f3b4914bSYatharth Kochar image_desc = bl1_plat_get_image_desc(image_id); 63f3b4914bSYatharth Kochar assert(image_desc); 64f3b4914bSYatharth Kochar 65f3b4914bSYatharth Kochar /* Get the entry point info. */ 66f3b4914bSYatharth Kochar next_bl_ep = &image_desc->ep_info; 67f3b4914bSYatharth Kochar 68f3b4914bSYatharth Kochar /* Get the image security state. */ 69f3b4914bSYatharth Kochar security_state = GET_SECURITY_STATE(next_bl_ep->h.attr); 70f3b4914bSYatharth Kochar 71f3b4914bSYatharth Kochar /* Setup the Secure/Non-Secure context if not done already. */ 72f3b4914bSYatharth Kochar if (!cm_get_context(security_state)) 73f3b4914bSYatharth Kochar cm_set_context(&bl1_cpu_context[security_state], security_state); 74f3b4914bSYatharth Kochar 75f3b4914bSYatharth Kochar /* Prepare the SPSR for the next BL image. */ 76*d200f230SJohn Tsichritzis if ((security_state != SECURE) && (el_implemented(2) != EL_IMPL_NONE)) { 77*d200f230SJohn Tsichritzis mode = MODE_EL2; 78f3b4914bSYatharth Kochar } 79*d200f230SJohn Tsichritzis 80*d200f230SJohn Tsichritzis next_bl_ep->spsr = SPSR_64(mode, MODE_SP_ELX, 81*d200f230SJohn Tsichritzis DISABLE_ALL_EXCEPTIONS); 82f3b4914bSYatharth Kochar 83f3b4914bSYatharth Kochar /* Allow platform to make change */ 84f3b4914bSYatharth Kochar bl1_plat_set_ep_info(image_id, next_bl_ep); 85f3b4914bSYatharth Kochar 86f3b4914bSYatharth Kochar /* Prepare the context for the next BL image. */ 87f3b4914bSYatharth Kochar cm_init_my_context(next_bl_ep); 88f3b4914bSYatharth Kochar cm_prepare_el3_exit(security_state); 89f3b4914bSYatharth Kochar 90f3b4914bSYatharth Kochar /* Indicate that image is in execution state. */ 91f3b4914bSYatharth Kochar image_desc->state = IMAGE_STATE_EXECUTED; 92f3b4914bSYatharth Kochar 93f3b4914bSYatharth Kochar print_entry_point_info(next_bl_ep); 94f3b4914bSYatharth Kochar } 95