1f3b4914bSYatharth Kochar /* 2f3b4914bSYatharth Kochar * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. 3f3b4914bSYatharth Kochar * 4*82cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 5f3b4914bSYatharth Kochar */ 6f3b4914bSYatharth Kochar 7f3b4914bSYatharth Kochar #include <arch_helpers.h> 8f3b4914bSYatharth Kochar #include <assert.h> 9f3b4914bSYatharth Kochar #include <context.h> 10f3b4914bSYatharth Kochar #include <context_mgmt.h> 11f3b4914bSYatharth Kochar #include <debug.h> 12f3b4914bSYatharth Kochar #include <platform.h> 13f3b4914bSYatharth Kochar 14f3b4914bSYatharth Kochar /* 15f3b4914bSYatharth Kochar * Following array will be used for context management. 16f3b4914bSYatharth Kochar * There are 2 instances, for the Secure and Non-Secure contexts. 17f3b4914bSYatharth Kochar */ 18f3b4914bSYatharth Kochar static cpu_context_t bl1_cpu_context[2]; 19f3b4914bSYatharth Kochar 20f3b4914bSYatharth Kochar /* Following contains the cpu context pointers. */ 21f3b4914bSYatharth Kochar static void *bl1_cpu_context_ptr[2]; 22f3b4914bSYatharth Kochar 23f3b4914bSYatharth Kochar 24f3b4914bSYatharth Kochar void *cm_get_context(uint32_t security_state) 25f3b4914bSYatharth Kochar { 26f3b4914bSYatharth Kochar assert(sec_state_is_valid(security_state)); 27f3b4914bSYatharth Kochar return bl1_cpu_context_ptr[security_state]; 28f3b4914bSYatharth Kochar } 29f3b4914bSYatharth Kochar 30f3b4914bSYatharth Kochar void cm_set_context(void *context, uint32_t security_state) 31f3b4914bSYatharth Kochar { 32f3b4914bSYatharth Kochar assert(sec_state_is_valid(security_state)); 33f3b4914bSYatharth Kochar bl1_cpu_context_ptr[security_state] = context; 34f3b4914bSYatharth Kochar } 35f3b4914bSYatharth Kochar 36f3b4914bSYatharth Kochar /******************************************************************************* 37f3b4914bSYatharth Kochar * This function prepares the context for Secure/Normal world images. 38f3b4914bSYatharth Kochar * Normal world images are transitioned to EL2(if supported) else EL1. 39f3b4914bSYatharth Kochar ******************************************************************************/ 40f3b4914bSYatharth Kochar void bl1_prepare_next_image(unsigned int image_id) 41f3b4914bSYatharth Kochar { 42f3b4914bSYatharth Kochar unsigned int security_state; 43f3b4914bSYatharth Kochar image_desc_t *image_desc; 44f3b4914bSYatharth Kochar entry_point_info_t *next_bl_ep; 45f3b4914bSYatharth Kochar 46f3b4914bSYatharth Kochar #if CTX_INCLUDE_AARCH32_REGS 47f3b4914bSYatharth Kochar /* 48f3b4914bSYatharth Kochar * Ensure that the build flag to save AArch32 system registers in CPU 49f3b4914bSYatharth Kochar * context is not set for AArch64-only platforms. 50f3b4914bSYatharth Kochar */ 51f3b4914bSYatharth Kochar if (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL1_SHIFT) 52f3b4914bSYatharth Kochar & ID_AA64PFR0_ELX_MASK) == 0x1) { 53f3b4914bSYatharth Kochar ERROR("EL1 supports AArch64-only. Please set build flag " 54f3b4914bSYatharth Kochar "CTX_INCLUDE_AARCH32_REGS = 0"); 55f3b4914bSYatharth Kochar panic(); 56f3b4914bSYatharth Kochar } 57f3b4914bSYatharth Kochar #endif 58f3b4914bSYatharth Kochar 59f3b4914bSYatharth Kochar /* Get the image descriptor. */ 60f3b4914bSYatharth Kochar image_desc = bl1_plat_get_image_desc(image_id); 61f3b4914bSYatharth Kochar assert(image_desc); 62f3b4914bSYatharth Kochar 63f3b4914bSYatharth Kochar /* Get the entry point info. */ 64f3b4914bSYatharth Kochar next_bl_ep = &image_desc->ep_info; 65f3b4914bSYatharth Kochar 66f3b4914bSYatharth Kochar /* Get the image security state. */ 67f3b4914bSYatharth Kochar security_state = GET_SECURITY_STATE(next_bl_ep->h.attr); 68f3b4914bSYatharth Kochar 69f3b4914bSYatharth Kochar /* Setup the Secure/Non-Secure context if not done already. */ 70f3b4914bSYatharth Kochar if (!cm_get_context(security_state)) 71f3b4914bSYatharth Kochar cm_set_context(&bl1_cpu_context[security_state], security_state); 72f3b4914bSYatharth Kochar 73f3b4914bSYatharth Kochar /* Prepare the SPSR for the next BL image. */ 74f3b4914bSYatharth Kochar if (security_state == SECURE) { 75f3b4914bSYatharth Kochar next_bl_ep->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, 76f3b4914bSYatharth Kochar DISABLE_ALL_EXCEPTIONS); 77f3b4914bSYatharth Kochar } else { 78f3b4914bSYatharth Kochar /* Use EL2 if supported else use EL1. */ 79f3b4914bSYatharth Kochar if (read_id_aa64pfr0_el1() & 80f3b4914bSYatharth Kochar (ID_AA64PFR0_ELX_MASK << ID_AA64PFR0_EL2_SHIFT)) { 81f3b4914bSYatharth Kochar next_bl_ep->spsr = SPSR_64(MODE_EL2, MODE_SP_ELX, 82f3b4914bSYatharth Kochar DISABLE_ALL_EXCEPTIONS); 83f3b4914bSYatharth Kochar } else { 84f3b4914bSYatharth Kochar next_bl_ep->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, 85f3b4914bSYatharth Kochar DISABLE_ALL_EXCEPTIONS); 86f3b4914bSYatharth Kochar } 87f3b4914bSYatharth Kochar } 88f3b4914bSYatharth Kochar 89f3b4914bSYatharth Kochar /* Allow platform to make change */ 90f3b4914bSYatharth Kochar bl1_plat_set_ep_info(image_id, next_bl_ep); 91f3b4914bSYatharth Kochar 92f3b4914bSYatharth Kochar /* Prepare the context for the next BL image. */ 93f3b4914bSYatharth Kochar cm_init_my_context(next_bl_ep); 94f3b4914bSYatharth Kochar cm_prepare_el3_exit(security_state); 95f3b4914bSYatharth Kochar 96f3b4914bSYatharth Kochar /* Indicate that image is in execution state. */ 97f3b4914bSYatharth Kochar image_desc->state = IMAGE_STATE_EXECUTED; 98f3b4914bSYatharth Kochar 99f3b4914bSYatharth Kochar print_entry_point_info(next_bl_ep); 100f3b4914bSYatharth Kochar } 101