14f6ad66aSAchin Gupta /* 2*ee006a79SDeepika Bhavnani * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved. 34f6ad66aSAchin Gupta * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 54f6ad66aSAchin Gupta */ 64f6ad66aSAchin Gupta 797043ac9SDan Handley #include <arch.h> 84f6ad66aSAchin Gupta #include <arch_helpers.h> 9c04d59cfSEtienne Carriere #include "../bl1_private.h" 104f6ad66aSAchin Gupta 114f6ad66aSAchin Gupta /******************************************************************************* 124f6ad66aSAchin Gupta * Function that does the first bit of architectural setup that affects 134f6ad66aSAchin Gupta * execution in the non-secure address space. 144f6ad66aSAchin Gupta ******************************************************************************/ 154f6ad66aSAchin Gupta void bl1_arch_setup(void) 164f6ad66aSAchin Gupta { 170c8d4fefSAchin Gupta /* Set the next EL to be AArch64 */ 18adb4fcfbSGerald Lejeune write_scr_el3(read_scr_el3() | SCR_RW_BIT); 194f6ad66aSAchin Gupta } 204f6ad66aSAchin Gupta 214f6ad66aSAchin Gupta /******************************************************************************* 224f6ad66aSAchin Gupta * Set the Secure EL1 required architectural state 234f6ad66aSAchin Gupta ******************************************************************************/ 244f2104ffSJuan Castillo void bl1_arch_next_el_setup(void) 254f2104ffSJuan Castillo { 26*ee006a79SDeepika Bhavnani u_register_t next_sctlr; 274f6ad66aSAchin Gupta 284f6ad66aSAchin Gupta /* Use the same endianness than the current BL */ 296ba0b6d6SVikram Kanigiri next_sctlr = (read_sctlr_el3() & SCTLR_EE_BIT); 304f6ad66aSAchin Gupta 314f6ad66aSAchin Gupta /* Set SCTLR Secure EL1 */ 324f6ad66aSAchin Gupta next_sctlr |= SCTLR_EL1_RES1; 334f6ad66aSAchin Gupta 344f6ad66aSAchin Gupta write_sctlr_el1(next_sctlr); 354f6ad66aSAchin Gupta } 36