xref: /rk3399_ARM-atf/bl1/aarch64/bl1_arch_setup.c (revision adb4fcfb4c515a9b9af68d386ed1350505480655)
14f6ad66aSAchin Gupta /*
2e83b0cadSDan Handley  * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
34f6ad66aSAchin Gupta  *
44f6ad66aSAchin Gupta  * Redistribution and use in source and binary forms, with or without
54f6ad66aSAchin Gupta  * modification, are permitted provided that the following conditions are met:
64f6ad66aSAchin Gupta  *
74f6ad66aSAchin Gupta  * Redistributions of source code must retain the above copyright notice, this
84f6ad66aSAchin Gupta  * list of conditions and the following disclaimer.
94f6ad66aSAchin Gupta  *
104f6ad66aSAchin Gupta  * Redistributions in binary form must reproduce the above copyright notice,
114f6ad66aSAchin Gupta  * this list of conditions and the following disclaimer in the documentation
124f6ad66aSAchin Gupta  * and/or other materials provided with the distribution.
134f6ad66aSAchin Gupta  *
144f6ad66aSAchin Gupta  * Neither the name of ARM nor the names of its contributors may be used
154f6ad66aSAchin Gupta  * to endorse or promote products derived from this software without specific
164f6ad66aSAchin Gupta  * prior written permission.
174f6ad66aSAchin Gupta  *
184f6ad66aSAchin Gupta  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
194f6ad66aSAchin Gupta  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
204f6ad66aSAchin Gupta  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
214f6ad66aSAchin Gupta  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
224f6ad66aSAchin Gupta  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
234f6ad66aSAchin Gupta  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
244f6ad66aSAchin Gupta  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
254f6ad66aSAchin Gupta  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
264f6ad66aSAchin Gupta  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
274f6ad66aSAchin Gupta  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
284f6ad66aSAchin Gupta  * POSSIBILITY OF SUCH DAMAGE.
294f6ad66aSAchin Gupta  */
304f6ad66aSAchin Gupta 
3197043ac9SDan Handley #include <arch.h>
324f6ad66aSAchin Gupta #include <arch_helpers.h>
334f6ad66aSAchin Gupta 
344f6ad66aSAchin Gupta /*******************************************************************************
354f6ad66aSAchin Gupta  * Function that does the first bit of architectural setup that affects
364f6ad66aSAchin Gupta  * execution in the non-secure address space.
374f6ad66aSAchin Gupta  ******************************************************************************/
384f6ad66aSAchin Gupta void bl1_arch_setup(void)
394f6ad66aSAchin Gupta {
400c8d4fefSAchin Gupta 	/* Set the next EL to be AArch64 */
41*adb4fcfbSGerald Lejeune 	write_scr_el3(read_scr_el3() | SCR_RW_BIT);
424f6ad66aSAchin Gupta }
434f6ad66aSAchin Gupta 
444f6ad66aSAchin Gupta /*******************************************************************************
454f6ad66aSAchin Gupta  * Set the Secure EL1 required architectural state
464f6ad66aSAchin Gupta  ******************************************************************************/
474f2104ffSJuan Castillo void bl1_arch_next_el_setup(void)
484f2104ffSJuan Castillo {
496ba0b6d6SVikram Kanigiri 	unsigned long next_sctlr;
504f6ad66aSAchin Gupta 
514f6ad66aSAchin Gupta 	/* Use the same endianness than the current BL */
526ba0b6d6SVikram Kanigiri 	next_sctlr = (read_sctlr_el3() & SCTLR_EE_BIT);
534f6ad66aSAchin Gupta 
544f6ad66aSAchin Gupta 	/* Set SCTLR Secure EL1 */
554f6ad66aSAchin Gupta 	next_sctlr |= SCTLR_EL1_RES1;
564f6ad66aSAchin Gupta 
574f6ad66aSAchin Gupta 	write_sctlr_el1(next_sctlr);
584f6ad66aSAchin Gupta }
59