1{ 2 "path": "./node_modules/cz-conventional-changelog", 3 "maxHeaderWidth": 50, 4 "maxLineWidth": 72, 5 "types": [ 6 { 7 "type": "feat", 8 "title": "New Features", 9 "description": "A new feature" 10 }, 11 { 12 "type": "fix", 13 "title": "Resolved Issues", 14 "description": "A bug fix" 15 }, 16 { 17 "type": "build", 18 "title": "Build System", 19 "description": "Changes that affect the build system or external dependencies", 20 "hidden": true 21 }, 22 { 23 "type": "ci", 24 "title": "Continuous Integration", 25 "description": "Changes to our CI configuration files and scripts", 26 "hidden": true 27 }, 28 { 29 "type": "docs", 30 "title": "Build System", 31 "description": "Documentation-only changes", 32 "hidden": true 33 }, 34 { 35 "type": "perf", 36 "title": "Performance Improvements", 37 "description": "A code change that improves performance", 38 "hidden": true 39 }, 40 { 41 "type": "refactor", 42 "title": "Code Refactoring", 43 "description": "A code change that neither fixes a bug nor adds a feature", 44 "hidden": true 45 }, 46 { 47 "type": "revert", 48 "title": "Reverted Changes", 49 "description": "Changes that revert a previous change", 50 "hidden": true 51 }, 52 { 53 "type": "style", 54 "title": "Style", 55 "description": "Changes that do not affect the meaning of the code (white-space, formatting, missing semi-colons, etc.)", 56 "hidden": true 57 }, 58 { 59 "type": "test", 60 "title": "Tests", 61 "description": "Adding missing tests or correcting existing tests", 62 "hidden": true 63 }, 64 { 65 "type": "chore", 66 "title": "Miscellaneous", 67 "description": "Any other change", 68 "hidden": true 69 } 70 ], 71 "sections": [ 72 { 73 "title": "Architecture", 74 "sections": [ 75 { 76 "title": "Activity Monitors Extension (FEAT_AMU)", 77 "scopes": ["amu"] 78 }, 79 { 80 "title": "Support for the `HCRX_EL2` register (FEAT_HCX)", 81 "scopes": ["hcx"] 82 }, 83 { 84 "title": "Memory Partitioning and Monitoring (MPAM) Extension (FEAT_MPAM)", 85 "scopes": ["mpam"] 86 }, 87 { 88 "title": "Scalable Matrix Extension (FEAT_SME)", 89 "scopes": ["sme"] 90 }, 91 { 92 "title": "Scalable Vector Extension (FEAT_SVE)", 93 "scopes": ["sve"] 94 }, 95 { 96 "title": "Trace Buffer Extension (FEAT_TRBE)", 97 "scopes": ["trbe"] 98 }, 99 { 100 "title": "Self-hosted Trace Extensions (FEAT_TRF)", 101 "scopes": ["trf", "sys_reg_trace"] 102 } 103 ] 104 }, 105 { 106 "title": "Platforms", 107 "sections": [ 108 { 109 "title": "Allwinner", 110 "scopes": ["allwinner", "plat/allwinner"] 111 }, 112 { 113 "title": "Arm", 114 "scopes": ["arm", "plat/arm"], 115 "sections": [ 116 { 117 "title": "FPGA", 118 "scopes": ["fpga", "arm_fgpa", "arm_fpga", "plat/arm_fpga"] 119 }, 120 { 121 "title": "FVP", 122 "scopes": ["fvp", "plat/fvp"] 123 }, 124 { 125 "title": "FVP-R", 126 "scopes": ["fvp-r", "fvp_r"] 127 }, 128 { 129 "title": "Juno", 130 "scopes": ["juno"] 131 }, 132 { 133 "title": "Morello", 134 "scopes": ["morello"] 135 }, 136 { 137 "title": "RD", 138 "scopes": ["rd"], 139 "sections": [ 140 { 141 "title": "RD-N2", 142 "scopes": ["rdn2", "board/rdn2"] 143 } 144 ] 145 }, 146 { 147 "title": "SGI", 148 "scopes": ["sgi", "plat/sgi", "plat/arm/sgi" ] 149 }, 150 { 151 "title": "TC", 152 "scopes": ["tc"], 153 "sections": [ 154 { 155 "title": "TC0", 156 "scopes": ["tc0", "plat/tc0"] 157 } 158 ] 159 } 160 ] 161 }, 162 { 163 "title": "Marvell", 164 "scopes": ["marvell", "plat/marvell"], 165 "sections": [ 166 { 167 "title": "Armada", 168 "scopes": ["armada", "plat/marvell/armada"], 169 "sections": [ 170 { 171 "title": "A3K", 172 "scopes": ["a3k", "plat/marvell/a3k"] 173 }, 174 { 175 "title": "A8K", 176 "scopes": ["a8k", "plat/marvell/a8k"] 177 } 178 ] 179 } 180 ] 181 }, 182 { 183 "title": "MediaTek", 184 "scopes": ["mediatek", "plat/mediatek/common", "plat/mediatek"], 185 "sections": [ 186 { 187 "title": "MT8183", 188 "scopes": ["mt8183", "plat/mediatek/mt8183"] 189 }, 190 { 191 "title": "MT8192", 192 "scopes": ["mt8192", "plat/mdeiatek/mt8192"] 193 }, 194 { 195 "title": "MT8195", 196 "scopes": ["mt8195", "plat/mediatek/me8195", "plat/mediatek/mt8195", "plat/mdeiatek/mt8195"] 197 }, 198 { 199 "title": "MT8186", 200 "scopes": ["mt8186", "plat/mediatek/mt8186"] 201 } 202 ] 203 }, 204 { 205 "title": "NVIDIA", 206 "scopes": ["nvidia"], 207 "sections": [ 208 { 209 "title": "Tegra", 210 "scopes": ["tegra", "plat/tegra"], 211 "sections": [ 212 { 213 "title": "Tegra 132", 214 "scopes": ["tegra132"] 215 } 216 ] 217 } 218 ] 219 }, 220 { 221 "title": "NXP", 222 "scopes": ["nxp", "plat/nxp", "plat/nxp/common"], 223 "sections": [ 224 { 225 "title": "i.MX", 226 "scopes": ["imx", "plat/imx", "plat/imx/imx"], 227 "sections": [ 228 { 229 "title": "i.MX 8M", 230 "scopes": ["imx8m", "plat/imx8m", "plat/imx/imx8m"], 231 "sections": [ 232 { 233 "title": "i.MX 8M Mini", 234 "scopes": ["imx8mm", "plat/imx/imx8m/imx8mm"] 235 }, 236 { 237 "title": "i.MX 8M Plus", 238 "scopes": ["imx8mp", "plat/imx/imx8m/imx8mp"] 239 } 240 ] 241 } 242 ] 243 }, 244 { 245 "title": "Layerscape", 246 "scopes": ["layerscape", "docs/nxp/layerscape"], 247 "sections": [ 248 { 249 "title": "LX2", 250 "scopes": ["lx2", "plat/nxp/lx2"], 251 "sections": [ 252 { 253 "title": "LX216", 254 "scopes": ["lx216", "plat/nxp/lx216x"], 255 "sections": [ 256 { 257 "title": "LX2160", 258 "scopes": ["lx2160", "plat/soc-lx2160"] 259 } 260 ] 261 }, 262 { 263 "title": "LS1028A", 264 "scopes": ["ls1028a", "plat/nxp/ls1028a"], 265 "sections": [ 266 { 267 "title": "LS1028ARDB", 268 "scopes": ["ls1028ardb", "plat/nxp/ls1028ardb"] 269 } 270 ] 271 } 272 ] 273 } 274 ] 275 } 276 ] 277 }, 278 { 279 "title": "QEMU", 280 "scopes": ["qemu", "plat/qemu"] 281 }, 282 { 283 "title": "QTI", 284 "scopes": ["qti"], 285 "sections": [ 286 { 287 "title": "SC1780", 288 "scopes": ["sc7180", "plat/qti/sc7180"] 289 }, 290 { 291 "title": "SC7280", 292 "scopes": ["sc7280", "plat/qti/sc7280"] 293 } 294 ] 295 }, 296 { 297 "title": "Raspberry Pi", 298 "scopes": ["rpi"], 299 "sections": [ 300 { 301 "title": "Raspberry Pi 4", 302 "scopes": ["rpi4"] 303 } 304 ] 305 }, 306 { 307 "title": "Renesas", 308 "scopes": ["renesas"], 309 "sections": [ 310 { 311 "title": "R-Car", 312 "scopes": ["rcar", "plat/rcar"], 313 "sections": [ 314 { 315 "title": "R-Car 3", 316 "scopes": ["rcar3", "plat/rcar3"] 317 } 318 ] 319 } 320 ] 321 }, 322 { 323 "title": "Rockchip", 324 "scopes": ["rockchip"], 325 "sections": [ 326 { 327 "title": "RK3399", 328 "scopes": ["rk3399", "rockchip/rk3399", "rk3399/suspend"] 329 } 330 ] 331 }, 332 { 333 "title": "Socionext", 334 "scopes": ["socionext"], 335 "sections": [ 336 { 337 "title": "Synquacer", 338 "scopes": ["synquacer", "plat/synquacer"] 339 } 340 ] 341 }, 342 { 343 "title": "ST", 344 "scopes": ["st", "plat/st"], 345 "sections": [ 346 { 347 "title": "ST32MP1", 348 "scopes": ["stm32mp1", "plat/st/stm32mp1"] 349 } 350 ] 351 }, 352 { 353 "title": "Xilinx", 354 "scopes": ["xilinx", "plat/xilinx"], 355 "sections": [ 356 { 357 "title": "Versal", 358 "scopes": ["versal", "plat/xilinx/versal/include", "plat/xilinx/versal", "plat/versal"] 359 }, 360 { 361 "title": "ZynqMP", 362 "scopes": ["zynqmp", "plat/zynqmp", "plat/xilinx/zynqmp"] 363 } 364 ] 365 } 366 ] 367 }, 368 { 369 "title": "Bootloader Images", 370 "scopes": ["bl", "bl_common"], 371 "sections": [ 372 { 373 "title": "BL1", 374 "scopes": ["bl1"] 375 }, 376 { 377 "title": "BL2", 378 "scopes": ["bl2"] 379 } 380 ] 381 }, 382 { 383 "title": "Services", 384 "scopes": ["services"], 385 "sections": [ 386 { 387 "title": "FF-A", 388 "scopes": ["ffa", "ff-a"] 389 }, 390 { 391 "title": "RME", 392 "scopes": ["rme"] 393 }, 394 { 395 "title": "SPM", 396 "scopes": ["spm", "spmc", "spmd", "SPMD", "spm_mm"] 397 } 398 ] 399 }, 400 { 401 "title": "Libraries", 402 "sections": [ 403 { 404 "title": "CPU Support", 405 "scopes": ["cpus", "cpu", "errata", "errata_report"] 406 }, 407 { 408 "title": "EL3 Runtime", 409 "scopes": ["el3-runtime", "el3_runtime"] 410 }, 411 { 412 "title": "FCONF", 413 "scopes": ["fconf"] 414 }, 415 { 416 "title": "MPMM", 417 "scopes": ["mpmm"] 418 }, 419 { 420 "title": "OP-TEE", 421 "scopes": ["optee", "lib/optee"] 422 }, 423 { 424 "title": "PSCI", 425 "scopes": ["psci"] 426 }, 427 { 428 "title": "GPT", 429 "scopes": ["gpt", "gpt_rme"] 430 }, 431 { 432 "title": "SMCCC", 433 "scopes": ["smccc"] 434 }, 435 { 436 "title": "Translation Tables", 437 "scopes": ["xlat"] 438 } 439 ] 440 }, 441 { 442 "title": "Drivers", 443 "sections": [ 444 { 445 "title": "Authentication", 446 "scopes": ["auth", "driver/auth"], 447 "sections": [ 448 { 449 "title": "CryptoCell-713", 450 "scopes": ["cc-713"] 451 } 452 ] 453 }, 454 { 455 "title": "FWU", 456 "scopes": ["fwu", "fwu_metadata"] 457 }, 458 { 459 "title": "I/O", 460 "scopes": ["io"], 461 "sections": [ 462 { 463 "title": "MTD", 464 "scopes": ["mtd", "io_mtd"] 465 } 466 ] 467 }, 468 { 469 "title": "Measured Boot", 470 "scopes": ["measured-boot", "measured boot", "measured_boot"] 471 }, 472 { 473 "title": "MMC", 474 "scopes": ["mmc", "drivers/mmc"] 475 }, 476 { 477 "title": "MTD", 478 "scopes": ["mtd", "drivers/mtd"], 479 "sections": [ 480 { 481 "title": "NAND", 482 "scopes": ["nand"], 483 "sections": [ 484 { 485 "title": "SPI NAND", 486 "scopes": ["spi-nand", "spi_nand"] 487 } 488 ] 489 } 490 ] 491 }, 492 { 493 "title": "SCMI", 494 "scopes": ["scmi", "scmi_common", "drivers/scmi-msg"] 495 }, 496 { 497 "title": "UFS", 498 "scopes": ["ufs"] 499 }, 500 { 501 "title": "Arm", 502 "scopes": ["arm-drivers"], 503 "sections": [ 504 { 505 "title": "Ethos-N", 506 "scopes": ["ethos-n", "drivers/arm/ethosn"] 507 }, 508 { 509 "title": "GIC", 510 "scopes": ["gic"], 511 "sections": [ 512 { 513 "title": "GICv3", 514 "scopes": ["gicv3"], 515 "sections": [ 516 { 517 "title": "GIC-600AE", 518 "scopes": ["gic600ae"] 519 } 520 ] 521 } 522 ] 523 }, 524 { 525 "title": "TZC", 526 "scopes": ["tzc"], 527 "sections": [ 528 { 529 "title": "TZC-400", 530 "scopes": ["tzc400", "drivers/tzc400"] 531 } 532 ] 533 } 534 ] 535 }, 536 { 537 "title": "Marvell", 538 "scopes": ["marvell-drivers"], 539 "sections": [ 540 { 541 "title": "COMPHY", 542 "scopes": ["marvell-comphy", "drivers/marvell/comphy"], 543 "sections": [ 544 { 545 "title": "Armada 3700", 546 "scopes": ["marvell-comphy-3700", "drivers/marvell/comphy-3700"] 547 }, 548 { 549 "title": "CP110", 550 "scopes": ["marvell-comphy-cp110", "drivers/marvell/comphy-cp110"] 551 } 552 ] 553 }, 554 { 555 "title": "UART", 556 "scopes": ["marvell-uart", "plat/marvell/uart"] 557 }, 558 { 559 "title": "Armada", 560 "scopes": ["armada-drivers"], 561 "sections": [ 562 { 563 "title": "A3K", 564 "scopes": ["a3k-drivers"], 565 "sections": [ 566 { 567 "title": "A3720", 568 "scopes": ["a3720-uart", "plat/marvell/a3720/uart"] 569 } 570 ] 571 } 572 ] 573 } 574 ] 575 }, 576 { 577 "title": "MediaTek", 578 "scopes": ["mediatek-drivers"], 579 "sections": [ 580 { 581 "title": "APU", 582 "scopes": ["mediatek-apu", "plat/mediatek/apu"] 583 }, 584 { 585 "title": "EMI MPU", 586 "scopes": ["mediatek-emi-mpu", "plat/mediatek/mpu"] 587 }, 588 { 589 "title": "PMIC Wrapper", 590 "scopes": ["mediatek-pmic-wrapper", "plat/mediatek/pmic_wrap"] 591 }, 592 { 593 "title": "MT8192", 594 "scopes": ["mt8192-drivers"], 595 "sections": [ 596 { 597 "title": "SPM", 598 "scopes": ["mt8192-spm", "mediatek/mt8192/spm"] 599 } 600 ] 601 } 602 ] 603 }, 604 { 605 "title": "NXP", 606 "scopes": ["nxp-drivers"], 607 "sections": [ 608 { 609 "title": "DCFG", 610 "scopes": ["nxp-dcfg", "driver/nxp/dcfg"] 611 }, 612 { 613 "title": "FLEXSPI", 614 "scopes": ["flexspi", "include/drivers/flexspi", "driver/nxp/xspi"] 615 }, 616 { 617 "title": "SCFG", 618 "scopes": ["nxp-scfg", "nxp/scfg"] 619 }, 620 { 621 "title": "SFP", 622 "scopes": ["nxp-sfp", "drivers/nxp/sfp"] 623 } 624 ] 625 }, 626 { 627 "title": "Renesas", 628 "scopes": ["renesas-drivers"], 629 "sections": [ 630 { 631 "title": "R-Car3", 632 "scopes": ["rcar3-drivers", "drivers/rcar3"] 633 } 634 ] 635 }, 636 { 637 "title": "ST", 638 "scopes": ["st-drivers", "drivers/st"], 639 "sections": [ 640 { 641 "title": "Clock", 642 "scopes": ["st-clock", "stm32mp_clk", "drivers/st/clk", "stm32mp1_clk"] 643 }, 644 { 645 "title": "I/O", 646 "scopes": ["st-io-drivers"], 647 "sections": [ 648 { 649 "title": "STM32 Image", 650 "scopes": ["st-io-stm32image", "io-stm32image", "io_stm32image"] 651 } 652 ] 653 }, 654 { 655 "title": "SDMMC2", 656 "scopes": ["st-sdmmc2", "stm32_sdmmc2"] 657 }, 658 { 659 "title": "ST PMIC", 660 "scopes": ["st-pmic", "drivers/st/pmic"] 661 }, 662 { 663 "title": "STPMIC1", 664 "scopes": ["stpmic1"] 665 }, 666 { 667 "title": "UART", 668 "scopes": ["st-uart"], 669 "sections": [ 670 { 671 "title": "STM32 Console", 672 "scopes": ["stm32-console", "stm32_console"] 673 } 674 ] 675 }, 676 { 677 "title": "USB", 678 "scopes": ["st-usb", "drivers/st/usb"] 679 } 680 ] 681 }, 682 { 683 "title": "USB", 684 "scopes": ["usb", "drivers/usb"] 685 } 686 ] 687 }, 688 { 689 "title": "Miscellaneous", 690 "sections": [ 691 { 692 "title": "AArch64", 693 "scopes": ["aarch64"] 694 }, 695 { 696 "title": "Debug", 697 "scopes": ["debug", "common/debug"] 698 }, 699 { 700 "title": "CRC32", 701 "scopes": ["crc32"], 702 "sections": [ 703 { 704 "title": "Hardware CRC32", 705 "scopes": ["hw-crc32", "hw_crc", "hw_crc32"] 706 }, 707 { 708 "title": "Software CRC32", 709 "scopes": ["sw-crc32", "sw_crc32"] 710 } 711 ] 712 }, 713 { 714 "title": "DT Bindings", 715 "scopes": ["dt-bindings"] 716 }, 717 { 718 "title": "FDT Wrappers", 719 "scopes": ["fdt-wrappers"] 720 }, 721 { 722 "title": "FDTs", 723 "scopes": ["fdts", "fdt"], 724 "sections": [ 725 { 726 "title": "Morello", 727 "scopes": ["morello-fdts", "fdts/morello"] 728 }, 729 { 730 "title": "STM32MP1", 731 "scopes": ["stm32mp1-fdts", "fdts stm32mp1"] 732 } 733 ] 734 }, 735 { 736 "title": "PIE", 737 "scopes": ["pie"] 738 }, 739 { 740 "title": "Security", 741 "scopes": ["security"] 742 }, 743 { 744 "title": "SDEI", 745 "scopes": ["sdei"] 746 }, 747 { 748 "title": "TBBR", 749 "scopes": ["tbbr"] 750 }, 751 { 752 "title": "NXP", 753 "sections": [ 754 { 755 "title": "OCRAM", 756 "scopes": ["nxp-ocram", "nxp/common/ocram"] 757 }, 758 { 759 "title": "PSCI", 760 "scopes": ["nxp-psci", "plat/nxp/common/psci"] 761 } 762 ] 763 } 764 ] 765 }, 766 { 767 "title": "Documentation", 768 "scopes": ["docs", "doc"], 769 "sections": [ 770 { 771 "title": "Changelog", 772 "scopes": ["changelog"] 773 }, 774 { 775 "title": "Commit Style", 776 "scopes": ["commit-style"] 777 }, 778 { 779 "title": "Contribution Guidelines", 780 "scopes": ["contributing", "contribution-guidelines", "docs-contributing.rst"] 781 }, 782 { 783 "title": "Maintainers", 784 "scopes": ["maintainers"] 785 }, 786 { 787 "title": "Prerequisites", 788 "scopes": ["prerequisites"] 789 } 790 ] 791 }, 792 { 793 "title": "Build System", 794 "scopes": ["build", "makefile", "Makefile"], 795 "sections": [ 796 { 797 "title": "Git Hooks", 798 "scopes": ["hooks"] 799 } 800 ] 801 }, 802 { 803 "title": "Tools", 804 "sections": [ 805 { 806 "title": "STM32 Image", 807 "scopes": ["stm32image", "tools/stm32image"] 808 } 809 ] 810 }, 811 { 812 "title": "Dependencies", 813 "scopes": ["deps"], 814 "sections": [ 815 { 816 "title": "checkpatch", 817 "scopes": ["checkpatch"] 818 }, 819 { 820 "title": "libfdt", 821 "scopes": ["libfdt"] 822 }, 823 { 824 "title": "Node Package Manager (NPM)", 825 "scopes": ["npm"] 826 } 827 ] 828 } 829 ] 830} 831