1{ 2 "path": "./node_modules/cz-conventional-changelog", 3 "maxHeaderWidth": 50, 4 "maxLineWidth": 72, 5 "types": [ 6 { 7 "type": "feat", 8 "title": "New Features", 9 "description": "A new feature" 10 }, 11 { 12 "type": "fix", 13 "title": "Resolved Issues", 14 "description": "A bug fix" 15 }, 16 { 17 "type": "build", 18 "title": "Build System", 19 "description": "Changes that affect the build system or external dependencies", 20 "hidden": true 21 }, 22 { 23 "type": "ci", 24 "title": "Continuous Integration", 25 "description": "Changes to our CI configuration files and scripts", 26 "hidden": true 27 }, 28 { 29 "type": "docs", 30 "title": "Build System", 31 "description": "Documentation-only changes", 32 "hidden": true 33 }, 34 { 35 "type": "perf", 36 "title": "Performance Improvements", 37 "description": "A code change that improves performance", 38 "hidden": true 39 }, 40 { 41 "type": "refactor", 42 "title": "Code Refactoring", 43 "description": "A code change that neither fixes a bug nor adds a feature", 44 "hidden": true 45 }, 46 { 47 "type": "revert", 48 "title": "Reverted Changes", 49 "description": "Changes that revert a previous change", 50 "hidden": true 51 }, 52 { 53 "type": "style", 54 "title": "Style", 55 "description": "Changes that do not affect the meaning of the code (white-space, formatting, missing semi-colons, etc.)", 56 "hidden": true 57 }, 58 { 59 "type": "test", 60 "title": "Tests", 61 "description": "Adding missing tests or correcting existing tests", 62 "hidden": true 63 }, 64 { 65 "type": "chore", 66 "title": "Miscellaneous", 67 "description": "Any other change", 68 "hidden": true 69 } 70 ], 71 "sections": [ 72 { 73 "title": "Architecture", 74 "sections": [ 75 { 76 "title": "Activity Monitors Extension (FEAT_AMU)", 77 "scopes": ["amu"] 78 }, 79 { 80 "title": "Support for the `HCRX_EL2` register (FEAT_HCX)", 81 "scopes": ["hcx"] 82 }, 83 { 84 "title": "Memory Partitioning and Monitoring (MPAM) Extension (FEAT_MPAM)", 85 "scopes": ["mpam"] 86 }, 87 { 88 "title": "Scalable Matrix Extension (FEAT_SME)", 89 "scopes": ["sme"] 90 }, 91 { 92 "title": "Scalable Vector Extension (FEAT_SVE)", 93 "scopes": ["sve"] 94 }, 95 { 96 "title": "System Register Trace Extensions (FEAT_ETMv4, FEAT_ETE and FEAT_ETEv1.1)", 97 "scopes": ["sys-reg-trace", "sys_reg_trace"] 98 }, 99 { 100 "title": "Trace Buffer Extension (FEAT_TRBE)", 101 "scopes": ["trbe"] 102 }, 103 { 104 "title": "Self-hosted Trace Extension (FEAT_TRF)", 105 "scopes": ["trf"] 106 } 107 ] 108 }, 109 { 110 "title": "Platforms", 111 "sections": [ 112 { 113 "title": "Allwinner", 114 "scopes": ["allwinner", "plat/allwinner"] 115 }, 116 { 117 "title": "Arm", 118 "scopes": ["arm", "plat/arm"], 119 "sections": [ 120 { 121 "title": "FPGA", 122 "scopes": ["fpga", "arm_fgpa", "arm_fpga", "plat/arm_fpga"] 123 }, 124 { 125 "title": "FVP", 126 "scopes": ["fvp", "plat/fvp"] 127 }, 128 { 129 "title": "FVP-R", 130 "scopes": ["fvp-r", "fvp_r"] 131 }, 132 { 133 "title": "Juno", 134 "scopes": ["juno"] 135 }, 136 { 137 "title": "Morello", 138 "scopes": ["morello"] 139 }, 140 { 141 "title": "RD", 142 "scopes": ["rd"], 143 "sections": [ 144 { 145 "title": "RD-N2", 146 "scopes": ["rdn2", "board/rdn2"] 147 } 148 ] 149 }, 150 { 151 "title": "SGI", 152 "scopes": ["sgi", "plat/sgi", "plat/arm/sgi" ] 153 }, 154 { 155 "title": "TC", 156 "scopes": ["tc"], 157 "sections": [ 158 { 159 "title": "TC0", 160 "scopes": ["tc0", "plat/tc0"] 161 } 162 ] 163 } 164 ] 165 }, 166 { 167 "title": "Marvell", 168 "scopes": ["marvell", "plat/marvell"], 169 "sections": [ 170 { 171 "title": "Armada", 172 "scopes": ["armada", "plat/marvell/armada"], 173 "sections": [ 174 { 175 "title": "A3K", 176 "scopes": ["a3k", "plat/marvell/a3k"] 177 }, 178 { 179 "title": "A8K", 180 "scopes": ["a8k", "plat/marvell/a8k"] 181 } 182 ] 183 } 184 ] 185 }, 186 { 187 "title": "MediaTek", 188 "scopes": ["mediatek", "plat/mediatek/common", "plat/mediatek"], 189 "sections": [ 190 { 191 "title": "MT8183", 192 "scopes": ["mt8183", "plat/mediatek/mt8183"] 193 }, 194 { 195 "title": "MT8192", 196 "scopes": ["mt8192", "plat/mdeiatek/mt8192"] 197 }, 198 { 199 "title": "MT8195", 200 "scopes": ["mt8195", "plat/mediatek/me8195", "plat/mediatek/mt8195", "plat/mdeiatek/mt8195"] 201 }, 202 { 203 "title": "MT8186", 204 "scopes": ["mt8186", "plat/mediatek/mt8186"] 205 } 206 ] 207 }, 208 { 209 "title": "NVIDIA", 210 "scopes": ["nvidia"], 211 "sections": [ 212 { 213 "title": "Tegra", 214 "scopes": ["tegra", "plat/tegra"], 215 "sections": [ 216 { 217 "title": "Tegra 132", 218 "scopes": ["tegra132"] 219 } 220 ] 221 } 222 ] 223 }, 224 { 225 "title": "NXP", 226 "scopes": ["nxp", "plat/nxp", "plat/nxp/common"], 227 "sections": [ 228 { 229 "title": "i.MX", 230 "scopes": ["imx", "plat/imx", "plat/imx/imx"], 231 "sections": [ 232 { 233 "title": "i.MX 8M", 234 "scopes": ["imx8m", "plat/imx8m", "plat/imx/imx8m"], 235 "sections": [ 236 { 237 "title": "i.MX 8M Mini", 238 "scopes": ["imx8mm", "plat/imx/imx8m/imx8mm"] 239 }, 240 { 241 "title": "i.MX 8M Plus", 242 "scopes": ["imx8mp", "plat/imx/imx8m/imx8mp"] 243 } 244 ] 245 } 246 ] 247 }, 248 { 249 "title": "Layerscape", 250 "scopes": ["layerscape", "docs/nxp/layerscape"], 251 "sections": [ 252 { 253 "title": "LX2", 254 "scopes": ["lx2", "plat/nxp/lx2"], 255 "sections": [ 256 { 257 "title": "LX216", 258 "scopes": ["lx216", "plat/nxp/lx216x"], 259 "sections": [ 260 { 261 "title": "LX2160", 262 "scopes": ["lx2160", "plat/soc-lx2160"] 263 } 264 ] 265 }, 266 { 267 "title": "LS1028A", 268 "scopes": ["ls1028a", "plat/nxp/ls1028a"], 269 "sections": [ 270 { 271 "title": "LS1028ARDB", 272 "scopes": ["ls1028ardb", "plat/nxp/ls1028ardb"] 273 } 274 ] 275 } 276 ] 277 } 278 ] 279 } 280 ] 281 }, 282 { 283 "title": "QEMU", 284 "scopes": ["qemu", "plat/qemu"] 285 }, 286 { 287 "title": "QTI", 288 "scopes": ["qti"], 289 "sections": [ 290 { 291 "title": "SC1780", 292 "scopes": ["sc7180", "plat/qti/sc7180"] 293 }, 294 { 295 "title": "SC7280", 296 "scopes": ["sc7280", "plat/qti/sc7280"] 297 } 298 ] 299 }, 300 { 301 "title": "Raspberry Pi", 302 "scopes": ["rpi"], 303 "sections": [ 304 { 305 "title": "Raspberry Pi 4", 306 "scopes": ["rpi4"] 307 } 308 ] 309 }, 310 { 311 "title": "Renesas", 312 "scopes": ["renesas"], 313 "sections": [ 314 { 315 "title": "R-Car", 316 "scopes": ["rcar", "plat/rcar"], 317 "sections": [ 318 { 319 "title": "R-Car 3", 320 "scopes": ["rcar3", "plat/rcar3"] 321 } 322 ] 323 } 324 ] 325 }, 326 { 327 "title": "Rockchip", 328 "scopes": ["rockchip"], 329 "sections": [ 330 { 331 "title": "RK3399", 332 "scopes": ["rk3399", "rockchip/rk3399", "rk3399/suspend"] 333 } 334 ] 335 }, 336 { 337 "title": "Socionext", 338 "scopes": ["socionext"], 339 "sections": [ 340 { 341 "title": "Synquacer", 342 "scopes": ["synquacer", "plat/synquacer"] 343 } 344 ] 345 }, 346 { 347 "title": "ST", 348 "scopes": ["st", "plat/st"], 349 "sections": [ 350 { 351 "title": "ST32MP1", 352 "scopes": ["stm32mp1", "plat/st/stm32mp1"] 353 } 354 ] 355 }, 356 { 357 "title": "Xilinx", 358 "scopes": ["xilinx", "plat/xilinx"], 359 "sections": [ 360 { 361 "title": "Versal", 362 "scopes": ["versal", "plat/xilinx/versal/include", "plat/xilinx/versal", "plat/versal"] 363 }, 364 { 365 "title": "ZynqMP", 366 "scopes": ["zynqmp", "plat/zynqmp", "plat/xilinx/zynqmp"] 367 } 368 ] 369 } 370 ] 371 }, 372 { 373 "title": "Bootloader Images", 374 "scopes": ["bl", "bl_common"], 375 "sections": [ 376 { 377 "title": "BL1", 378 "scopes": ["bl1"] 379 }, 380 { 381 "title": "BL2", 382 "scopes": ["bl2"] 383 } 384 ] 385 }, 386 { 387 "title": "Services", 388 "scopes": ["services"], 389 "sections": [ 390 { 391 "title": "FF-A", 392 "scopes": ["ffa", "ff-a"] 393 }, 394 { 395 "title": "RME", 396 "scopes": ["rme"] 397 }, 398 { 399 "title": "SPM", 400 "scopes": ["spm", "spmc", "spmd", "SPMD", "spm_mm"] 401 } 402 ] 403 }, 404 { 405 "title": "Libraries", 406 "sections": [ 407 { 408 "title": "CPU Support", 409 "scopes": ["cpus", "cpu", "errata", "errata_report"] 410 }, 411 { 412 "title": "EL3 Runtime", 413 "scopes": ["el3-runtime", "el3_runtime"] 414 }, 415 { 416 "title": "FCONF", 417 "scopes": ["fconf"] 418 }, 419 { 420 "title": "MPMM", 421 "scopes": ["mpmm"] 422 }, 423 { 424 "title": "OP-TEE", 425 "scopes": ["optee", "lib/optee"] 426 }, 427 { 428 "title": "PSCI", 429 "scopes": ["psci"] 430 }, 431 { 432 "title": "GPT", 433 "scopes": ["gpt", "gpt_rme"] 434 }, 435 { 436 "title": "SMCCC", 437 "scopes": ["smccc"] 438 }, 439 { 440 "title": "Translation Tables", 441 "scopes": ["xlat"] 442 } 443 ] 444 }, 445 { 446 "title": "Drivers", 447 "sections": [ 448 { 449 "title": "Authentication", 450 "scopes": ["auth", "driver/auth"], 451 "sections": [ 452 { 453 "title": "CryptoCell-713", 454 "scopes": ["cc-713"] 455 } 456 ] 457 }, 458 { 459 "title": "FWU", 460 "scopes": ["fwu", "fwu_metadata"] 461 }, 462 { 463 "title": "I/O", 464 "scopes": ["io"], 465 "sections": [ 466 { 467 "title": "MTD", 468 "scopes": ["mtd", "io_mtd"] 469 } 470 ] 471 }, 472 { 473 "title": "Measured Boot", 474 "scopes": ["measured-boot", "measured boot", "measured_boot"] 475 }, 476 { 477 "title": "MMC", 478 "scopes": ["mmc", "drivers/mmc"] 479 }, 480 { 481 "title": "MTD", 482 "scopes": ["mtd", "drivers/mtd"], 483 "sections": [ 484 { 485 "title": "NAND", 486 "scopes": ["nand"], 487 "sections": [ 488 { 489 "title": "SPI NAND", 490 "scopes": ["spi-nand", "spi_nand"] 491 } 492 ] 493 } 494 ] 495 }, 496 { 497 "title": "SCMI", 498 "scopes": ["scmi", "scmi_common", "drivers/scmi-msg"] 499 }, 500 { 501 "title": "UFS", 502 "scopes": ["ufs"] 503 }, 504 { 505 "title": "Arm", 506 "scopes": ["arm-drivers"], 507 "sections": [ 508 { 509 "title": "Ethos-N", 510 "scopes": ["ethos-n", "drivers/arm/ethosn"] 511 }, 512 { 513 "title": "GIC", 514 "scopes": ["gic"], 515 "sections": [ 516 { 517 "title": "GICv3", 518 "scopes": ["gicv3"], 519 "sections": [ 520 { 521 "title": "GIC-600AE", 522 "scopes": ["gic600ae"] 523 } 524 ] 525 } 526 ] 527 }, 528 { 529 "title": "TZC", 530 "scopes": ["tzc"], 531 "sections": [ 532 { 533 "title": "TZC-400", 534 "scopes": ["tzc400", "drivers/tzc400"] 535 } 536 ] 537 } 538 ] 539 }, 540 { 541 "title": "Marvell", 542 "scopes": ["marvell-drivers"], 543 "sections": [ 544 { 545 "title": "COMPHY", 546 "scopes": ["marvell-comphy", "drivers/marvell/comphy"], 547 "sections": [ 548 { 549 "title": "Armada 3700", 550 "scopes": ["marvell-comphy-3700", "drivers/marvell/comphy-3700"] 551 }, 552 { 553 "title": "CP110", 554 "scopes": ["marvell-comphy-cp110", "drivers/marvell/comphy-cp110"] 555 } 556 ] 557 }, 558 { 559 "title": "UART", 560 "scopes": ["marvell-uart", "plat/marvell/uart"] 561 }, 562 { 563 "title": "Armada", 564 "scopes": ["armada-drivers"], 565 "sections": [ 566 { 567 "title": "A3K", 568 "scopes": ["a3k-drivers"], 569 "sections": [ 570 { 571 "title": "A3720", 572 "scopes": ["a3720-uart", "plat/marvell/a3720/uart"] 573 } 574 ] 575 } 576 ] 577 } 578 ] 579 }, 580 { 581 "title": "MediaTek", 582 "scopes": ["mediatek-drivers"], 583 "sections": [ 584 { 585 "title": "APU", 586 "scopes": ["mediatek-apu", "plat/mediatek/apu"] 587 }, 588 { 589 "title": "EMI MPU", 590 "scopes": ["mediatek-emi-mpu", "plat/mediatek/mpu"] 591 }, 592 { 593 "title": "PMIC Wrapper", 594 "scopes": ["mediatek-pmic-wrapper", "plat/mediatek/pmic_wrap"] 595 }, 596 { 597 "title": "MT8192", 598 "scopes": ["mt8192-drivers"], 599 "sections": [ 600 { 601 "title": "SPM", 602 "scopes": ["mt8192-spm", "mediatek/mt8192/spm"] 603 } 604 ] 605 } 606 ] 607 }, 608 { 609 "title": "NXP", 610 "scopes": ["nxp-drivers"], 611 "sections": [ 612 { 613 "title": "DCFG", 614 "scopes": ["nxp-dcfg", "driver/nxp/dcfg"] 615 }, 616 { 617 "title": "FLEXSPI", 618 "scopes": ["flexspi", "include/drivers/flexspi", "driver/nxp/xspi"] 619 }, 620 { 621 "title": "SCFG", 622 "scopes": ["nxp-scfg", "nxp/scfg"] 623 }, 624 { 625 "title": "SFP", 626 "scopes": ["nxp-sfp", "drivers/nxp/sfp"] 627 } 628 ] 629 }, 630 { 631 "title": "Renesas", 632 "scopes": ["renesas-drivers"], 633 "sections": [ 634 { 635 "title": "R-Car3", 636 "scopes": ["rcar3-drivers", "drivers/rcar3"] 637 } 638 ] 639 }, 640 { 641 "title": "ST", 642 "scopes": ["st-drivers", "drivers/st"], 643 "sections": [ 644 { 645 "title": "Clock", 646 "scopes": ["st-clock", "stm32mp_clk", "drivers/st/clk", "stm32mp1_clk"] 647 }, 648 { 649 "title": "I/O", 650 "scopes": ["st-io-drivers"], 651 "sections": [ 652 { 653 "title": "STM32 Image", 654 "scopes": ["st-io-stm32image", "io-stm32image", "io_stm32image"] 655 } 656 ] 657 }, 658 { 659 "title": "SDMMC2", 660 "scopes": ["st-sdmmc2", "stm32_sdmmc2"] 661 }, 662 { 663 "title": "ST PMIC", 664 "scopes": ["st-pmic", "drivers/st/pmic"] 665 }, 666 { 667 "title": "STPMIC1", 668 "scopes": ["stpmic1"] 669 }, 670 { 671 "title": "UART", 672 "scopes": ["st-uart"], 673 "sections": [ 674 { 675 "title": "STM32 Console", 676 "scopes": ["stm32-console", "stm32_console"] 677 } 678 ] 679 }, 680 { 681 "title": "USB", 682 "scopes": ["st-usb", "drivers/st/usb"] 683 } 684 ] 685 }, 686 { 687 "title": "USB", 688 "scopes": ["usb", "drivers/usb"] 689 } 690 ] 691 }, 692 { 693 "title": "Miscellaneous", 694 "sections": [ 695 { 696 "title": "AArch64", 697 "scopes": ["aarch64"] 698 }, 699 { 700 "title": "Debug", 701 "scopes": ["debug", "common/debug"] 702 }, 703 { 704 "title": "CRC32", 705 "scopes": ["crc32"], 706 "sections": [ 707 { 708 "title": "Hardware CRC32", 709 "scopes": ["hw-crc32", "hw_crc", "hw_crc32"] 710 }, 711 { 712 "title": "Software CRC32", 713 "scopes": ["sw-crc32", "sw_crc32"] 714 } 715 ] 716 }, 717 { 718 "title": "DT Bindings", 719 "scopes": ["dt-bindings"] 720 }, 721 { 722 "title": "FDT Wrappers", 723 "scopes": ["fdt-wrappers"] 724 }, 725 { 726 "title": "FDTs", 727 "scopes": ["fdts", "fdt"], 728 "sections": [ 729 { 730 "title": "Morello", 731 "scopes": ["morello-fdts", "fdts/morello"] 732 }, 733 { 734 "title": "STM32MP1", 735 "scopes": ["stm32mp1-fdts", "fdts stm32mp1"] 736 } 737 ] 738 }, 739 { 740 "title": "PIE", 741 "scopes": ["pie"] 742 }, 743 { 744 "title": "Security", 745 "scopes": ["security"] 746 }, 747 { 748 "title": "SDEI", 749 "scopes": ["sdei"] 750 }, 751 { 752 "title": "TBBR", 753 "scopes": ["tbbr"] 754 }, 755 { 756 "title": "NXP", 757 "sections": [ 758 { 759 "title": "OCRAM", 760 "scopes": ["nxp-ocram", "nxp/common/ocram"] 761 }, 762 { 763 "title": "PSCI", 764 "scopes": ["nxp-psci", "plat/nxp/common/psci"] 765 } 766 ] 767 } 768 ] 769 }, 770 { 771 "title": "Documentation", 772 "scopes": ["docs", "doc"], 773 "sections": [ 774 { 775 "title": "Changelog", 776 "scopes": ["changelog"] 777 }, 778 { 779 "title": "Commit Style", 780 "scopes": ["commit-style"] 781 }, 782 { 783 "title": "Contribution Guidelines", 784 "scopes": ["contributing", "contribution-guidelines", "docs-contributing.rst"] 785 }, 786 { 787 "title": "Maintainers", 788 "scopes": ["maintainers"] 789 }, 790 { 791 "title": "Prerequisites", 792 "scopes": ["prerequisites"] 793 } 794 ] 795 }, 796 { 797 "title": "Build System", 798 "scopes": ["build", "makefile", "Makefile"], 799 "sections": [ 800 { 801 "title": "Git Hooks", 802 "scopes": ["hooks"] 803 } 804 ] 805 }, 806 { 807 "title": "Tools", 808 "sections": [ 809 { 810 "title": "STM32 Image", 811 "scopes": ["stm32image", "tools/stm32image"] 812 } 813 ] 814 }, 815 { 816 "title": "Dependencies", 817 "scopes": ["deps"], 818 "sections": [ 819 { 820 "title": "checkpatch", 821 "scopes": ["checkpatch"] 822 }, 823 { 824 "title": "libfdt", 825 "scopes": ["libfdt"] 826 }, 827 { 828 "title": "Node Package Manager (NPM)", 829 "scopes": ["npm"] 830 } 831 ] 832 } 833 ] 834} 835