1/* SPDX-License-Identifier: BSD-3-Clause */ 2/* 3 Copyright (c) 2011, 2012 ARM Ltd 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions 8 are met: 9 1. Redistributions of source code must retain the above copyright 10 notice, this list of conditions and the following disclaimer. 11 2. Redistributions in binary form must reproduce the above copyright 12 notice, this list of conditions and the following disclaimer in the 13 documentation and/or other materials provided with the distribution. 14 3. The name of the company may not be used to endorse or promote 15 products derived from this software without specific prior written 16 permission. 17 18 THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED 19 WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 20 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 23 TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 24 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 25 LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 26 NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30#define GPR_LAYOUT \ 31 REG_PAIR (x19, x20, 0); \ 32 REG_PAIR (x21, x22, 16); \ 33 REG_PAIR (x23, x24, 32); \ 34 REG_PAIR (x25, x26, 48); \ 35 REG_PAIR (x27, x28, 64); \ 36 REG_PAIR (x29, x30, 80); \ 37 REG_ONE (x16, 96) 38 39#define FPR_LAYOUT \ 40 REG_PAIR ( d8, d9, 112); \ 41 REG_PAIR (d10, d11, 128); \ 42 REG_PAIR (d12, d13, 144); \ 43 REG_PAIR (d14, d15, 160); 44 45// int setjmp (jmp_buf) 46 .global setjmp 47 .type setjmp, %function 48setjmp: 49 mov x16, sp 50#define REG_PAIR(REG1, REG2, OFFS) stp REG1, REG2, [x0, OFFS] 51#define REG_ONE(REG1, OFFS) str REG1, [x0, OFFS] 52 GPR_LAYOUT 53 FPR_LAYOUT 54#ifdef CFG_FTRACE_SUPPORT 55 stp x29, x30, [sp, #-16]! 56 mov x29, sp 57 add x0, x0, #104 58 bl ftrace_setjmp 59 ldp x29, x30, [sp], #16 60#endif 61#undef REG_PAIR 62#undef REG_ONE 63 mov w0, #0 64 ret 65 .size setjmp, .-setjmp 66 67// void longjmp (jmp_buf, int) __attribute__ ((noreturn)) 68 .global longjmp 69 .type longjmp, %function 70longjmp: 71#define REG_PAIR(REG1, REG2, OFFS) ldp REG1, REG2, [x0, OFFS] 72#define REG_ONE(REG1, OFFS) ldr REG1, [x0, OFFS] 73#ifdef CFG_FTRACE_SUPPORT 74 stp x0, x1, [sp, #-16]! 75 stp x29, x30, [sp, #-16]! 76 mov x29, sp 77 add x0, x0, #104 78 bl ftrace_longjmp 79 ldp x29, x30, [sp], #16 80 ldp x0, x1, [sp], #16 81#endif 82 GPR_LAYOUT 83 FPR_LAYOUT 84#undef REG_PAIR 85#undef REG_ONE 86 mov sp, x16 87 cmp w1, #0 88 cinc w0, w1, eq 89 // use br not ret, as ret is guaranteed to mispredict 90 br x30 91 .size longjmp, .-longjmp 92