1/* SPDX-License-Identifier: BSD-3-Clause */ 2/* 3 Copyright (c) 2011, 2012 ARM Ltd 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions 8 are met: 9 1. Redistributions of source code must retain the above copyright 10 notice, this list of conditions and the following disclaimer. 11 2. Redistributions in binary form must reproduce the above copyright 12 notice, this list of conditions and the following disclaimer in the 13 documentation and/or other materials provided with the distribution. 14 3. The name of the company may not be used to endorse or promote 15 products derived from this software without specific prior written 16 permission. 17 18 THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED 19 WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 20 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 23 TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 24 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 25 LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 26 NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 27 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30#include <asm.S> 31 32#define GPR_LAYOUT \ 33 REG_PAIR (x19, x20, 0); \ 34 REG_PAIR (x21, x22, 16); \ 35 REG_PAIR (x23, x24, 32); \ 36 REG_PAIR (x25, x26, 48); \ 37 REG_PAIR (x27, x28, 64); \ 38 REG_PAIR (x29, x30, 80); \ 39 REG_ONE (x16, 96) 40 41#define FPR_LAYOUT \ 42 REG_PAIR ( d8, d9, 112); \ 43 REG_PAIR (d10, d11, 128); \ 44 REG_PAIR (d12, d13, 144); \ 45 REG_PAIR (d14, d15, 160); 46 47// int setjmp (jmp_buf) 48 .global setjmp 49 .type setjmp, %function 50setjmp: 51BTI( bti c) 52 mov x16, sp 53#define REG_PAIR(REG1, REG2, OFFS) stp REG1, REG2, [x0, OFFS] 54#define REG_ONE(REG1, OFFS) str REG1, [x0, OFFS] 55 GPR_LAYOUT 56 FPR_LAYOUT 57#ifdef CFG_FTRACE_SUPPORT 58 stp x29, x30, [sp, #-16]! 59 mov x29, sp 60 add x0, x0, #104 61 bl ftrace_setjmp 62 ldp x29, x30, [sp], #16 63#endif 64#undef REG_PAIR 65#undef REG_ONE 66 mov w0, #0 67 ret 68 .size setjmp, .-setjmp 69 70// void longjmp (jmp_buf, int) __attribute__ ((noreturn)) 71 .global longjmp 72 .type longjmp, %function 73longjmp: 74BTI( bti c) 75#define REG_PAIR(REG1, REG2, OFFS) ldp REG1, REG2, [x0, OFFS] 76#define REG_ONE(REG1, OFFS) ldr REG1, [x0, OFFS] 77#ifdef CFG_FTRACE_SUPPORT 78 stp x0, x1, [sp, #-16]! 79 stp x29, x30, [sp, #-16]! 80 mov x29, sp 81 add x0, x0, #104 82 bl ftrace_longjmp 83 ldp x29, x30, [sp], #16 84 ldp x0, x1, [sp], #16 85#endif 86#if defined(__KERNEL__) && defined(CFG_CORE_SANITIZE_KADDRESS) && \ 87 !defined(CFG_DYN_CONFIG) 88 stp x0, x1, [sp, #-16]! 89 ldr x0, [x0, 96] 90 bl asan_handle_longjmp 91 ldp x0, x1, [sp], #16 92#endif 93 GPR_LAYOUT 94 FPR_LAYOUT 95#undef REG_PAIR 96#undef REG_ONE 97 mov sp, x16 98 cmp w1, #0 99 cinc w0, w1, eq 100/* 101 * clang has a bug and doesn't insert bti after setjmp 102 * causing BTI ecxception. Remove this when the bug is fixed. 103 * https://bugs.llvm.org/show_bug.cgi?id=49544 104 */ 105#if defined(__clang__) && defined(CFG_TA_BTI) 106 ret 107#else 108 // use br not ret, as ret is guaranteed to mispredict 109 br x30 110#endif 111 .size longjmp, .-longjmp 112 113BTI(emit_aarch64_feature_1_and GNU_PROPERTY_AARCH64_FEATURE_1_BTI) 114