1 /* SPDX-License-Identifier: BSD-2-Clause */ 2 /* 3 * Copyright (C) 2022, STMicroelectronics - All Rights Reserved 4 */ 5 6 #ifndef __PTA_STM32MP_BSEC_H 7 #define __PTA_STM32MP_BSEC_H 8 9 #define PTA_BSEC_UUID { 0x94cf71ad, 0x80e6, 0x40b5, \ 10 { 0xa7, 0xc6, 0x3d, 0xc5, 0x01, 0xeb, 0x28, 0x03 } } 11 12 /** 13 * Read OTP memory 14 * 15 * [in] value[0].a OTP start offset in byte 16 * [in] value[0].b Access type, see PTA_BSEC_TYPE_* 17 * [out] memref[1].buffer Output buffer to store read values 18 * [out] memref[1].size Size of OTP to be read 19 * 20 * Return codes: 21 * TEE_SUCCESS - Invoke command success 22 * TEE_ERROR_BAD_PARAMETERS - Incorrect input param 23 */ 24 #define PTA_BSEC_CMD_READ_OTP 0x0 25 26 /** 27 * Write OTP memory 28 * 29 * [in] value[0].a OTP start offset in byte 30 * [in] value[0].b Access type (0 : shadow, 31 * 1 : fuse, 2 : lock) 32 * [in] memref[1].buffer Input buffer to read values 33 * [in] memref[1].size Size of OTP to be written 34 * 35 * Return codes: 36 * TEE_SUCCESS - Invoke command success 37 * TEE_ERROR_BAD_PARAMETERS - Incorrect input param 38 * TEE_ERROR_ACCESS_DENIED - OTP not accessible by caller 39 */ 40 #define PTA_BSEC_CMD_WRITE_OTP 0x1 41 42 /** 43 * Get BSEC state 44 * Return the chip security level by reading the BSEC state 45 * 46 * [out] value[0].a One of PTA_BSEC_STATE_* 47 * Return codes: 48 * TEE_SUCCESS - Invoke command success 49 * TEE_ERROR_BAD_PARAMETERS - Incorrect input param 50 */ 51 #define PTA_BSEC_CMD_GET_STATE 0x3 52 53 enum stm32_bsec_pta_sec_state { 54 PTA_BSEC_STATE_SEC_OPEN = 0, 55 PTA_BSEC_STATE_SEC_CLOSE = 1, 56 PTA_BSEC_STATE_INVALID = 3 57 }; 58 59 /* 60 * Access types identifiers for PTA_BSEC_CMD_READ_OTP and 61 * PTA_BSEC_CMD_WRITE_OTP = value[in].b. 62 * 63 * PTA_BSEC_SHADOW_ACCESS Access OTP shadow memory 64 * PTA_BSEC_FUSE_ACCESS Access OTP fuse memory 65 * PTA_BSEC_LOCKS_ACCESS Access OTP locks. The locks value read/written 66 * in memref[1] 32bit words are related to bit flag 67 * masks PTA_BSEC_LOCK_*. 68 */ 69 #define PTA_BSEC_SHADOW_ACCESS 0 70 #define PTA_BSEC_FUSE_ACCESS 1 71 #define PTA_BSEC_LOCKS_ACCESS 2 72 73 /* 74 * PTA_BSEC_LOCK_* - Bit mask of OTP locks in memref[1] 75 * 76 * PTA_BSEC_LOCK_PERM Fuse programming permanent lock 77 * PTA_BSEC_LOCK_SHADOW_R Shadow programming (from fuse) lock 78 * PTA_BSEC_LOCK_SHADOW_W Shadow memory write lock 79 * PTA_BSEC_LOCK_SHADOW_P Fuse programming sticky lock 80 * PTA_BSEC_LOCK_ERROR Flag indicating an error in lock access 81 */ 82 #define PTA_BSEC_LOCK_PERM BIT(30) 83 #define PTA_BSEC_LOCK_SHADOW_R BIT(29) 84 #define PTA_BSEC_LOCK_SHADOW_W BIT(28) 85 #define PTA_BSEC_LOCK_SHADOW_P BIT(27) 86 #define PTA_BSEC_LOCK_ERROR BIT(26) 87 88 #endif /* __PTA_STM32MP_BSEC_H */ 89