1 /* 2 * AES-NI support functions 3 * 4 * Copyright The Mbed TLS Contributors 5 * SPDX-License-Identifier: Apache-2.0 6 * 7 * Licensed under the Apache License, Version 2.0 (the "License"); you may 8 * not use this file except in compliance with the License. 9 * You may obtain a copy of the License at 10 * 11 * http://www.apache.org/licenses/LICENSE-2.0 12 * 13 * Unless required by applicable law or agreed to in writing, software 14 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT 15 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 16 * See the License for the specific language governing permissions and 17 * limitations under the License. 18 */ 19 20 /* 21 * [AES-WP] https://www.intel.com/content/www/us/en/developer/articles/tool/intel-advanced-encryption-standard-aes-instructions-set.html 22 * [CLMUL-WP] https://www.intel.com/content/www/us/en/develop/download/intel-carry-less-multiplication-instruction-and-its-usage-for-computing-the-gcm-mode.html 23 */ 24 25 #include "common.h" 26 27 #if defined(MBEDTLS_AESNI_C) 28 29 #include "aesni.h" 30 31 #include <string.h> 32 33 #if defined(MBEDTLS_AESNI_HAVE_CODE) 34 35 #if MBEDTLS_AESNI_HAVE_CODE == 2 36 #if !defined(_WIN32) 37 #include <cpuid.h> 38 #endif 39 #include <immintrin.h> 40 #endif 41 42 /* 43 * AES-NI support detection routine 44 */ 45 int mbedtls_aesni_has_support(unsigned int what) 46 { 47 static int done = 0; 48 static unsigned int c = 0; 49 50 if (!done) { 51 #if MBEDTLS_AESNI_HAVE_CODE == 2 52 static unsigned info[4] = { 0, 0, 0, 0 }; 53 #if defined(_MSC_VER) 54 __cpuid(info, 1); 55 #else 56 __cpuid(1, info[0], info[1], info[2], info[3]); 57 #endif 58 c = info[2]; 59 #else /* AESNI using asm */ 60 asm ("movl $1, %%eax \n\t" 61 "cpuid \n\t" 62 : "=c" (c) 63 : 64 : "eax", "ebx", "edx"); 65 #endif /* MBEDTLS_AESNI_HAVE_CODE */ 66 done = 1; 67 } 68 69 return (c & what) != 0; 70 } 71 72 #if MBEDTLS_AESNI_HAVE_CODE == 2 73 74 /* 75 * AES-NI AES-ECB block en(de)cryption 76 */ 77 int mbedtls_aesni_crypt_ecb(mbedtls_aes_context *ctx, 78 int mode, 79 const unsigned char input[16], 80 unsigned char output[16]) 81 { 82 const __m128i *rk = (const __m128i *) (ctx->buf + ctx->rk_offset); 83 unsigned nr = ctx->nr; // Number of remaining rounds 84 85 // Load round key 0 86 __m128i state; 87 memcpy(&state, input, 16); 88 state = _mm_xor_si128(state, rk[0]); // state ^= *rk; 89 ++rk; 90 --nr; 91 92 if (mode == 0) { 93 while (nr != 0) { 94 state = _mm_aesdec_si128(state, *rk); 95 ++rk; 96 --nr; 97 } 98 state = _mm_aesdeclast_si128(state, *rk); 99 } else { 100 while (nr != 0) { 101 state = _mm_aesenc_si128(state, *rk); 102 ++rk; 103 --nr; 104 } 105 state = _mm_aesenclast_si128(state, *rk); 106 } 107 108 memcpy(output, &state, 16); 109 return 0; 110 } 111 112 /* 113 * GCM multiplication: c = a times b in GF(2^128) 114 * Based on [CLMUL-WP] algorithms 1 (with equation 27) and 5. 115 */ 116 117 static void gcm_clmul(const __m128i aa, const __m128i bb, 118 __m128i *cc, __m128i *dd) 119 { 120 /* 121 * Caryless multiplication dd:cc = aa * bb 122 * using [CLMUL-WP] algorithm 1 (p. 12). 123 */ 124 *cc = _mm_clmulepi64_si128(aa, bb, 0x00); // a0*b0 = c1:c0 125 *dd = _mm_clmulepi64_si128(aa, bb, 0x11); // a1*b1 = d1:d0 126 __m128i ee = _mm_clmulepi64_si128(aa, bb, 0x10); // a0*b1 = e1:e0 127 __m128i ff = _mm_clmulepi64_si128(aa, bb, 0x01); // a1*b0 = f1:f0 128 ff = _mm_xor_si128(ff, ee); // e1+f1:e0+f0 129 ee = ff; // e1+f1:e0+f0 130 ff = _mm_srli_si128(ff, 8); // 0:e1+f1 131 ee = _mm_slli_si128(ee, 8); // e0+f0:0 132 *dd = _mm_xor_si128(*dd, ff); // d1:d0+e1+f1 133 *cc = _mm_xor_si128(*cc, ee); // c1+e0+f0:c0 134 } 135 136 static void gcm_shift(__m128i *cc, __m128i *dd) 137 { 138 /* [CMUCL-WP] Algorithm 5 Step 1: shift cc:dd one bit to the left, 139 * taking advantage of [CLMUL-WP] eq 27 (p. 18). */ 140 // // *cc = r1:r0 141 // // *dd = r3:r2 142 __m128i cc_lo = _mm_slli_epi64(*cc, 1); // r1<<1:r0<<1 143 __m128i dd_lo = _mm_slli_epi64(*dd, 1); // r3<<1:r2<<1 144 __m128i cc_hi = _mm_srli_epi64(*cc, 63); // r1>>63:r0>>63 145 __m128i dd_hi = _mm_srli_epi64(*dd, 63); // r3>>63:r2>>63 146 __m128i xmm5 = _mm_srli_si128(cc_hi, 8); // 0:r1>>63 147 cc_hi = _mm_slli_si128(cc_hi, 8); // r0>>63:0 148 dd_hi = _mm_slli_si128(dd_hi, 8); // 0:r1>>63 149 150 *cc = _mm_or_si128(cc_lo, cc_hi); // r1<<1|r0>>63:r0<<1 151 *dd = _mm_or_si128(_mm_or_si128(dd_lo, dd_hi), xmm5); // r3<<1|r2>>62:r2<<1|r1>>63 152 } 153 154 static __m128i gcm_reduce(__m128i xx) 155 { 156 // // xx = x1:x0 157 /* [CLMUL-WP] Algorithm 5 Step 2 */ 158 __m128i aa = _mm_slli_epi64(xx, 63); // x1<<63:x0<<63 = stuff:a 159 __m128i bb = _mm_slli_epi64(xx, 62); // x1<<62:x0<<62 = stuff:b 160 __m128i cc = _mm_slli_epi64(xx, 57); // x1<<57:x0<<57 = stuff:c 161 __m128i dd = _mm_slli_si128(_mm_xor_si128(_mm_xor_si128(aa, bb), cc), 8); // a+b+c:0 162 return _mm_xor_si128(dd, xx); // x1+a+b+c:x0 = d:x0 163 } 164 165 static __m128i gcm_mix(__m128i dx) 166 { 167 /* [CLMUL-WP] Algorithm 5 Steps 3 and 4 */ 168 __m128i ee = _mm_srli_epi64(dx, 1); // e1:x0>>1 = e1:e0' 169 __m128i ff = _mm_srli_epi64(dx, 2); // f1:x0>>2 = f1:f0' 170 __m128i gg = _mm_srli_epi64(dx, 7); // g1:x0>>7 = g1:g0' 171 172 // e0'+f0'+g0' is almost e0+f0+g0, except for some missing 173 // bits carried from d. Now get those bits back in. 174 __m128i eh = _mm_slli_epi64(dx, 63); // d<<63:stuff 175 __m128i fh = _mm_slli_epi64(dx, 62); // d<<62:stuff 176 __m128i gh = _mm_slli_epi64(dx, 57); // d<<57:stuff 177 __m128i hh = _mm_srli_si128(_mm_xor_si128(_mm_xor_si128(eh, fh), gh), 8); // 0:missing bits of d 178 179 return _mm_xor_si128(_mm_xor_si128(_mm_xor_si128(_mm_xor_si128(ee, ff), gg), hh), dx); 180 } 181 182 void mbedtls_aesni_gcm_mult(unsigned char c[16], 183 const unsigned char a[16], 184 const unsigned char b[16]) 185 { 186 __m128i aa, bb, cc, dd; 187 188 /* The inputs are in big-endian order, so byte-reverse them */ 189 for (size_t i = 0; i < 16; i++) { 190 ((uint8_t *) &aa)[i] = a[15 - i]; 191 ((uint8_t *) &bb)[i] = b[15 - i]; 192 } 193 194 gcm_clmul(aa, bb, &cc, &dd); 195 gcm_shift(&cc, &dd); 196 /* 197 * Now reduce modulo the GCM polynomial x^128 + x^7 + x^2 + x + 1 198 * using [CLMUL-WP] algorithm 5 (p. 18). 199 * Currently dd:cc holds x3:x2:x1:x0 (already shifted). 200 */ 201 __m128i dx = gcm_reduce(cc); 202 __m128i xh = gcm_mix(dx); 203 cc = _mm_xor_si128(xh, dd); // x3+h1:x2+h0 204 205 /* Now byte-reverse the outputs */ 206 for (size_t i = 0; i < 16; i++) { 207 c[i] = ((uint8_t *) &cc)[15 - i]; 208 } 209 210 return; 211 } 212 213 /* 214 * Compute decryption round keys from encryption round keys 215 */ 216 void mbedtls_aesni_inverse_key(unsigned char *invkey, 217 const unsigned char *fwdkey, int nr) 218 { 219 __m128i *ik = (__m128i *) invkey; 220 const __m128i *fk = (const __m128i *) fwdkey + nr; 221 222 *ik = *fk; 223 for (--fk, ++ik; fk > (const __m128i *) fwdkey; --fk, ++ik) { 224 *ik = _mm_aesimc_si128(*fk); 225 } 226 *ik = *fk; 227 } 228 229 /* 230 * Key expansion, 128-bit case 231 */ 232 static __m128i aesni_set_rk_128(__m128i state, __m128i xword) 233 { 234 /* 235 * Finish generating the next round key. 236 * 237 * On entry state is r3:r2:r1:r0 and xword is X:stuff:stuff:stuff 238 * with X = rot( sub( r3 ) ) ^ RCON (obtained with AESKEYGENASSIST). 239 * 240 * On exit, xword is r7:r6:r5:r4 241 * with r4 = X + r0, r5 = r4 + r1, r6 = r5 + r2, r7 = r6 + r3 242 * and this is returned, to be written to the round key buffer. 243 */ 244 xword = _mm_shuffle_epi32(xword, 0xff); // X:X:X:X 245 xword = _mm_xor_si128(xword, state); // X+r3:X+r2:X+r1:r4 246 state = _mm_slli_si128(state, 4); // r2:r1:r0:0 247 xword = _mm_xor_si128(xword, state); // X+r3+r2:X+r2+r1:r5:r4 248 state = _mm_slli_si128(state, 4); // r1:r0:0:0 249 xword = _mm_xor_si128(xword, state); // X+r3+r2+r1:r6:r5:r4 250 state = _mm_slli_si128(state, 4); // r0:0:0:0 251 state = _mm_xor_si128(xword, state); // r7:r6:r5:r4 252 return state; 253 } 254 255 static void aesni_setkey_enc_128(unsigned char *rk_bytes, 256 const unsigned char *key) 257 { 258 __m128i *rk = (__m128i *) rk_bytes; 259 260 memcpy(&rk[0], key, 16); 261 rk[1] = aesni_set_rk_128(rk[0], _mm_aeskeygenassist_si128(rk[0], 0x01)); 262 rk[2] = aesni_set_rk_128(rk[1], _mm_aeskeygenassist_si128(rk[1], 0x02)); 263 rk[3] = aesni_set_rk_128(rk[2], _mm_aeskeygenassist_si128(rk[2], 0x04)); 264 rk[4] = aesni_set_rk_128(rk[3], _mm_aeskeygenassist_si128(rk[3], 0x08)); 265 rk[5] = aesni_set_rk_128(rk[4], _mm_aeskeygenassist_si128(rk[4], 0x10)); 266 rk[6] = aesni_set_rk_128(rk[5], _mm_aeskeygenassist_si128(rk[5], 0x20)); 267 rk[7] = aesni_set_rk_128(rk[6], _mm_aeskeygenassist_si128(rk[6], 0x40)); 268 rk[8] = aesni_set_rk_128(rk[7], _mm_aeskeygenassist_si128(rk[7], 0x80)); 269 rk[9] = aesni_set_rk_128(rk[8], _mm_aeskeygenassist_si128(rk[8], 0x1B)); 270 rk[10] = aesni_set_rk_128(rk[9], _mm_aeskeygenassist_si128(rk[9], 0x36)); 271 } 272 273 /* 274 * Key expansion, 192-bit case 275 */ 276 static void aesni_set_rk_192(__m128i *state0, __m128i *state1, __m128i xword, 277 unsigned char *rk) 278 { 279 /* 280 * Finish generating the next 6 quarter-keys. 281 * 282 * On entry state0 is r3:r2:r1:r0, state1 is stuff:stuff:r5:r4 283 * and xword is stuff:stuff:X:stuff with X = rot( sub( r3 ) ) ^ RCON 284 * (obtained with AESKEYGENASSIST). 285 * 286 * On exit, state0 is r9:r8:r7:r6 and state1 is stuff:stuff:r11:r10 287 * and those are written to the round key buffer. 288 */ 289 xword = _mm_shuffle_epi32(xword, 0x55); // X:X:X:X 290 xword = _mm_xor_si128(xword, *state0); // X+r3:X+r2:X+r1:X+r0 291 *state0 = _mm_slli_si128(*state0, 4); // r2:r1:r0:0 292 xword = _mm_xor_si128(xword, *state0); // X+r3+r2:X+r2+r1:X+r1+r0:X+r0 293 *state0 = _mm_slli_si128(*state0, 4); // r1:r0:0:0 294 xword = _mm_xor_si128(xword, *state0); // X+r3+r2+r1:X+r2+r1+r0:X+r1+r0:X+r0 295 *state0 = _mm_slli_si128(*state0, 4); // r0:0:0:0 296 xword = _mm_xor_si128(xword, *state0); // X+r3+r2+r1+r0:X+r2+r1+r0:X+r1+r0:X+r0 297 *state0 = xword; // = r9:r8:r7:r6 298 299 xword = _mm_shuffle_epi32(xword, 0xff); // r9:r9:r9:r9 300 xword = _mm_xor_si128(xword, *state1); // stuff:stuff:r9+r5:r9+r4 301 *state1 = _mm_slli_si128(*state1, 4); // stuff:stuff:r4:0 302 xword = _mm_xor_si128(xword, *state1); // stuff:stuff:r9+r5+r4:r9+r4 303 *state1 = xword; // = stuff:stuff:r11:r10 304 305 /* Store state0 and the low half of state1 into rk, which is conceptually 306 * an array of 24-byte elements. Since 24 is not a multiple of 16, 307 * rk is not necessarily aligned so just `*rk = *state0` doesn't work. */ 308 memcpy(rk, state0, 16); 309 memcpy(rk + 16, state1, 8); 310 } 311 312 static void aesni_setkey_enc_192(unsigned char *rk, 313 const unsigned char *key) 314 { 315 /* First round: use original key */ 316 memcpy(rk, key, 24); 317 /* aes.c guarantees that rk is aligned on a 16-byte boundary. */ 318 __m128i state0 = ((__m128i *) rk)[0]; 319 __m128i state1 = _mm_loadl_epi64(((__m128i *) rk) + 1); 320 321 aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x01), rk + 24 * 1); 322 aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x02), rk + 24 * 2); 323 aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x04), rk + 24 * 3); 324 aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x08), rk + 24 * 4); 325 aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x10), rk + 24 * 5); 326 aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x20), rk + 24 * 6); 327 aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x40), rk + 24 * 7); 328 aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x80), rk + 24 * 8); 329 } 330 331 /* 332 * Key expansion, 256-bit case 333 */ 334 static void aesni_set_rk_256(__m128i state0, __m128i state1, __m128i xword, 335 __m128i *rk0, __m128i *rk1) 336 { 337 /* 338 * Finish generating the next two round keys. 339 * 340 * On entry state0 is r3:r2:r1:r0, state1 is r7:r6:r5:r4 and 341 * xword is X:stuff:stuff:stuff with X = rot( sub( r7 )) ^ RCON 342 * (obtained with AESKEYGENASSIST). 343 * 344 * On exit, *rk0 is r11:r10:r9:r8 and *rk1 is r15:r14:r13:r12 345 */ 346 xword = _mm_shuffle_epi32(xword, 0xff); 347 xword = _mm_xor_si128(xword, state0); 348 state0 = _mm_slli_si128(state0, 4); 349 xword = _mm_xor_si128(xword, state0); 350 state0 = _mm_slli_si128(state0, 4); 351 xword = _mm_xor_si128(xword, state0); 352 state0 = _mm_slli_si128(state0, 4); 353 state0 = _mm_xor_si128(state0, xword); 354 *rk0 = state0; 355 356 /* Set xword to stuff:Y:stuff:stuff with Y = subword( r11 ) 357 * and proceed to generate next round key from there */ 358 xword = _mm_aeskeygenassist_si128(state0, 0x00); 359 xword = _mm_shuffle_epi32(xword, 0xaa); 360 xword = _mm_xor_si128(xword, state1); 361 state1 = _mm_slli_si128(state1, 4); 362 xword = _mm_xor_si128(xword, state1); 363 state1 = _mm_slli_si128(state1, 4); 364 xword = _mm_xor_si128(xword, state1); 365 state1 = _mm_slli_si128(state1, 4); 366 state1 = _mm_xor_si128(state1, xword); 367 *rk1 = state1; 368 } 369 370 static void aesni_setkey_enc_256(unsigned char *rk_bytes, 371 const unsigned char *key) 372 { 373 __m128i *rk = (__m128i *) rk_bytes; 374 375 memcpy(&rk[0], key, 16); 376 memcpy(&rk[1], key + 16, 16); 377 378 /* 379 * Main "loop" - Generating one more key than necessary, 380 * see definition of mbedtls_aes_context.buf 381 */ 382 aesni_set_rk_256(rk[0], rk[1], _mm_aeskeygenassist_si128(rk[1], 0x01), &rk[2], &rk[3]); 383 aesni_set_rk_256(rk[2], rk[3], _mm_aeskeygenassist_si128(rk[3], 0x02), &rk[4], &rk[5]); 384 aesni_set_rk_256(rk[4], rk[5], _mm_aeskeygenassist_si128(rk[5], 0x04), &rk[6], &rk[7]); 385 aesni_set_rk_256(rk[6], rk[7], _mm_aeskeygenassist_si128(rk[7], 0x08), &rk[8], &rk[9]); 386 aesni_set_rk_256(rk[8], rk[9], _mm_aeskeygenassist_si128(rk[9], 0x10), &rk[10], &rk[11]); 387 aesni_set_rk_256(rk[10], rk[11], _mm_aeskeygenassist_si128(rk[11], 0x20), &rk[12], &rk[13]); 388 aesni_set_rk_256(rk[12], rk[13], _mm_aeskeygenassist_si128(rk[13], 0x40), &rk[14], &rk[15]); 389 } 390 391 #else /* MBEDTLS_AESNI_HAVE_CODE == 1 */ 392 393 #if defined(__has_feature) 394 #if __has_feature(memory_sanitizer) 395 #warning \ 396 "MBEDTLS_AESNI_C is known to cause spurious error reports with some memory sanitizers as they do not understand the assembly code." 397 #endif 398 #endif 399 400 /* 401 * Binutils needs to be at least 2.19 to support AES-NI instructions. 402 * Unfortunately, a lot of users have a lower version now (2014-04). 403 * Emit bytecode directly in order to support "old" version of gas. 404 * 405 * Opcodes from the Intel architecture reference manual, vol. 3. 406 * We always use registers, so we don't need prefixes for memory operands. 407 * Operand macros are in gas order (src, dst) as opposed to Intel order 408 * (dst, src) in order to blend better into the surrounding assembly code. 409 */ 410 #define AESDEC(regs) ".byte 0x66,0x0F,0x38,0xDE," regs "\n\t" 411 #define AESDECLAST(regs) ".byte 0x66,0x0F,0x38,0xDF," regs "\n\t" 412 #define AESENC(regs) ".byte 0x66,0x0F,0x38,0xDC," regs "\n\t" 413 #define AESENCLAST(regs) ".byte 0x66,0x0F,0x38,0xDD," regs "\n\t" 414 #define AESIMC(regs) ".byte 0x66,0x0F,0x38,0xDB," regs "\n\t" 415 #define AESKEYGENA(regs, imm) ".byte 0x66,0x0F,0x3A,0xDF," regs "," imm "\n\t" 416 #define PCLMULQDQ(regs, imm) ".byte 0x66,0x0F,0x3A,0x44," regs "," imm "\n\t" 417 418 #define xmm0_xmm0 "0xC0" 419 #define xmm0_xmm1 "0xC8" 420 #define xmm0_xmm2 "0xD0" 421 #define xmm0_xmm3 "0xD8" 422 #define xmm0_xmm4 "0xE0" 423 #define xmm1_xmm0 "0xC1" 424 #define xmm1_xmm2 "0xD1" 425 426 /* 427 * AES-NI AES-ECB block en(de)cryption 428 */ 429 int mbedtls_aesni_crypt_ecb(mbedtls_aes_context *ctx, 430 int mode, 431 const unsigned char input[16], 432 unsigned char output[16]) 433 { 434 asm ("movdqu (%3), %%xmm0 \n\t" // load input 435 "movdqu (%1), %%xmm1 \n\t" // load round key 0 436 "pxor %%xmm1, %%xmm0 \n\t" // round 0 437 "add $16, %1 \n\t" // point to next round key 438 "subl $1, %0 \n\t" // normal rounds = nr - 1 439 "test %2, %2 \n\t" // mode? 440 "jz 2f \n\t" // 0 = decrypt 441 442 "1: \n\t" // encryption loop 443 "movdqu (%1), %%xmm1 \n\t" // load round key 444 AESENC(xmm1_xmm0) // do round 445 "add $16, %1 \n\t" // point to next round key 446 "subl $1, %0 \n\t" // loop 447 "jnz 1b \n\t" 448 "movdqu (%1), %%xmm1 \n\t" // load round key 449 AESENCLAST(xmm1_xmm0) // last round 450 "jmp 3f \n\t" 451 452 "2: \n\t" // decryption loop 453 "movdqu (%1), %%xmm1 \n\t" 454 AESDEC(xmm1_xmm0) // do round 455 "add $16, %1 \n\t" 456 "subl $1, %0 \n\t" 457 "jnz 2b \n\t" 458 "movdqu (%1), %%xmm1 \n\t" // load round key 459 AESDECLAST(xmm1_xmm0) // last round 460 461 "3: \n\t" 462 "movdqu %%xmm0, (%4) \n\t" // export output 463 : 464 : "r" (ctx->nr), "r" (ctx->buf + ctx->rk_offset), "r" (mode), "r" (input), "r" (output) 465 : "memory", "cc", "xmm0", "xmm1"); 466 467 468 return 0; 469 } 470 471 /* 472 * GCM multiplication: c = a times b in GF(2^128) 473 * Based on [CLMUL-WP] algorithms 1 (with equation 27) and 5. 474 */ 475 void mbedtls_aesni_gcm_mult(unsigned char c[16], 476 const unsigned char a[16], 477 const unsigned char b[16]) 478 { 479 unsigned char aa[16], bb[16], cc[16]; 480 size_t i; 481 482 /* The inputs are in big-endian order, so byte-reverse them */ 483 for (i = 0; i < 16; i++) { 484 aa[i] = a[15 - i]; 485 bb[i] = b[15 - i]; 486 } 487 488 asm ("movdqu (%0), %%xmm0 \n\t" // a1:a0 489 "movdqu (%1), %%xmm1 \n\t" // b1:b0 490 491 /* 492 * Caryless multiplication xmm2:xmm1 = xmm0 * xmm1 493 * using [CLMUL-WP] algorithm 1 (p. 12). 494 */ 495 "movdqa %%xmm1, %%xmm2 \n\t" // copy of b1:b0 496 "movdqa %%xmm1, %%xmm3 \n\t" // same 497 "movdqa %%xmm1, %%xmm4 \n\t" // same 498 PCLMULQDQ(xmm0_xmm1, "0x00") // a0*b0 = c1:c0 499 PCLMULQDQ(xmm0_xmm2, "0x11") // a1*b1 = d1:d0 500 PCLMULQDQ(xmm0_xmm3, "0x10") // a0*b1 = e1:e0 501 PCLMULQDQ(xmm0_xmm4, "0x01") // a1*b0 = f1:f0 502 "pxor %%xmm3, %%xmm4 \n\t" // e1+f1:e0+f0 503 "movdqa %%xmm4, %%xmm3 \n\t" // same 504 "psrldq $8, %%xmm4 \n\t" // 0:e1+f1 505 "pslldq $8, %%xmm3 \n\t" // e0+f0:0 506 "pxor %%xmm4, %%xmm2 \n\t" // d1:d0+e1+f1 507 "pxor %%xmm3, %%xmm1 \n\t" // c1+e0+f1:c0 508 509 /* 510 * Now shift the result one bit to the left, 511 * taking advantage of [CLMUL-WP] eq 27 (p. 18) 512 */ 513 "movdqa %%xmm1, %%xmm3 \n\t" // r1:r0 514 "movdqa %%xmm2, %%xmm4 \n\t" // r3:r2 515 "psllq $1, %%xmm1 \n\t" // r1<<1:r0<<1 516 "psllq $1, %%xmm2 \n\t" // r3<<1:r2<<1 517 "psrlq $63, %%xmm3 \n\t" // r1>>63:r0>>63 518 "psrlq $63, %%xmm4 \n\t" // r3>>63:r2>>63 519 "movdqa %%xmm3, %%xmm5 \n\t" // r1>>63:r0>>63 520 "pslldq $8, %%xmm3 \n\t" // r0>>63:0 521 "pslldq $8, %%xmm4 \n\t" // r2>>63:0 522 "psrldq $8, %%xmm5 \n\t" // 0:r1>>63 523 "por %%xmm3, %%xmm1 \n\t" // r1<<1|r0>>63:r0<<1 524 "por %%xmm4, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1 525 "por %%xmm5, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1|r1>>63 526 527 /* 528 * Now reduce modulo the GCM polynomial x^128 + x^7 + x^2 + x + 1 529 * using [CLMUL-WP] algorithm 5 (p. 18). 530 * Currently xmm2:xmm1 holds x3:x2:x1:x0 (already shifted). 531 */ 532 /* Step 2 (1) */ 533 "movdqa %%xmm1, %%xmm3 \n\t" // x1:x0 534 "movdqa %%xmm1, %%xmm4 \n\t" // same 535 "movdqa %%xmm1, %%xmm5 \n\t" // same 536 "psllq $63, %%xmm3 \n\t" // x1<<63:x0<<63 = stuff:a 537 "psllq $62, %%xmm4 \n\t" // x1<<62:x0<<62 = stuff:b 538 "psllq $57, %%xmm5 \n\t" // x1<<57:x0<<57 = stuff:c 539 540 /* Step 2 (2) */ 541 "pxor %%xmm4, %%xmm3 \n\t" // stuff:a+b 542 "pxor %%xmm5, %%xmm3 \n\t" // stuff:a+b+c 543 "pslldq $8, %%xmm3 \n\t" // a+b+c:0 544 "pxor %%xmm3, %%xmm1 \n\t" // x1+a+b+c:x0 = d:x0 545 546 /* Steps 3 and 4 */ 547 "movdqa %%xmm1,%%xmm0 \n\t" // d:x0 548 "movdqa %%xmm1,%%xmm4 \n\t" // same 549 "movdqa %%xmm1,%%xmm5 \n\t" // same 550 "psrlq $1, %%xmm0 \n\t" // e1:x0>>1 = e1:e0' 551 "psrlq $2, %%xmm4 \n\t" // f1:x0>>2 = f1:f0' 552 "psrlq $7, %%xmm5 \n\t" // g1:x0>>7 = g1:g0' 553 "pxor %%xmm4, %%xmm0 \n\t" // e1+f1:e0'+f0' 554 "pxor %%xmm5, %%xmm0 \n\t" // e1+f1+g1:e0'+f0'+g0' 555 // e0'+f0'+g0' is almost e0+f0+g0, ex\tcept for some missing 556 // bits carried from d. Now get those\t bits back in. 557 "movdqa %%xmm1,%%xmm3 \n\t" // d:x0 558 "movdqa %%xmm1,%%xmm4 \n\t" // same 559 "movdqa %%xmm1,%%xmm5 \n\t" // same 560 "psllq $63, %%xmm3 \n\t" // d<<63:stuff 561 "psllq $62, %%xmm4 \n\t" // d<<62:stuff 562 "psllq $57, %%xmm5 \n\t" // d<<57:stuff 563 "pxor %%xmm4, %%xmm3 \n\t" // d<<63+d<<62:stuff 564 "pxor %%xmm5, %%xmm3 \n\t" // missing bits of d:stuff 565 "psrldq $8, %%xmm3 \n\t" // 0:missing bits of d 566 "pxor %%xmm3, %%xmm0 \n\t" // e1+f1+g1:e0+f0+g0 567 "pxor %%xmm1, %%xmm0 \n\t" // h1:h0 568 "pxor %%xmm2, %%xmm0 \n\t" // x3+h1:x2+h0 569 570 "movdqu %%xmm0, (%2) \n\t" // done 571 : 572 : "r" (aa), "r" (bb), "r" (cc) 573 : "memory", "cc", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5"); 574 575 /* Now byte-reverse the outputs */ 576 for (i = 0; i < 16; i++) { 577 c[i] = cc[15 - i]; 578 } 579 580 return; 581 } 582 583 /* 584 * Compute decryption round keys from encryption round keys 585 */ 586 void mbedtls_aesni_inverse_key(unsigned char *invkey, 587 const unsigned char *fwdkey, int nr) 588 { 589 unsigned char *ik = invkey; 590 const unsigned char *fk = fwdkey + 16 * nr; 591 592 memcpy(ik, fk, 16); 593 594 for (fk -= 16, ik += 16; fk > fwdkey; fk -= 16, ik += 16) { 595 asm ("movdqu (%0), %%xmm0 \n\t" 596 AESIMC(xmm0_xmm0) 597 "movdqu %%xmm0, (%1) \n\t" 598 : 599 : "r" (fk), "r" (ik) 600 : "memory", "xmm0"); 601 } 602 603 memcpy(ik, fk, 16); 604 } 605 606 /* 607 * Key expansion, 128-bit case 608 */ 609 static void aesni_setkey_enc_128(unsigned char *rk, 610 const unsigned char *key) 611 { 612 asm ("movdqu (%1), %%xmm0 \n\t" // copy the original key 613 "movdqu %%xmm0, (%0) \n\t" // as round key 0 614 "jmp 2f \n\t" // skip auxiliary routine 615 616 /* 617 * Finish generating the next round key. 618 * 619 * On entry xmm0 is r3:r2:r1:r0 and xmm1 is X:stuff:stuff:stuff 620 * with X = rot( sub( r3 ) ) ^ RCON. 621 * 622 * On exit, xmm0 is r7:r6:r5:r4 623 * with r4 = X + r0, r5 = r4 + r1, r6 = r5 + r2, r7 = r6 + r3 624 * and those are written to the round key buffer. 625 */ 626 "1: \n\t" 627 "pshufd $0xff, %%xmm1, %%xmm1 \n\t" // X:X:X:X 628 "pxor %%xmm0, %%xmm1 \n\t" // X+r3:X+r2:X+r1:r4 629 "pslldq $4, %%xmm0 \n\t" // r2:r1:r0:0 630 "pxor %%xmm0, %%xmm1 \n\t" // X+r3+r2:X+r2+r1:r5:r4 631 "pslldq $4, %%xmm0 \n\t" // etc 632 "pxor %%xmm0, %%xmm1 \n\t" 633 "pslldq $4, %%xmm0 \n\t" 634 "pxor %%xmm1, %%xmm0 \n\t" // update xmm0 for next time! 635 "add $16, %0 \n\t" // point to next round key 636 "movdqu %%xmm0, (%0) \n\t" // write it 637 "ret \n\t" 638 639 /* Main "loop" */ 640 "2: \n\t" 641 AESKEYGENA(xmm0_xmm1, "0x01") "call 1b \n\t" 642 AESKEYGENA(xmm0_xmm1, "0x02") "call 1b \n\t" 643 AESKEYGENA(xmm0_xmm1, "0x04") "call 1b \n\t" 644 AESKEYGENA(xmm0_xmm1, "0x08") "call 1b \n\t" 645 AESKEYGENA(xmm0_xmm1, "0x10") "call 1b \n\t" 646 AESKEYGENA(xmm0_xmm1, "0x20") "call 1b \n\t" 647 AESKEYGENA(xmm0_xmm1, "0x40") "call 1b \n\t" 648 AESKEYGENA(xmm0_xmm1, "0x80") "call 1b \n\t" 649 AESKEYGENA(xmm0_xmm1, "0x1B") "call 1b \n\t" 650 AESKEYGENA(xmm0_xmm1, "0x36") "call 1b \n\t" 651 : 652 : "r" (rk), "r" (key) 653 : "memory", "cc", "0"); 654 } 655 656 /* 657 * Key expansion, 192-bit case 658 */ 659 static void aesni_setkey_enc_192(unsigned char *rk, 660 const unsigned char *key) 661 { 662 asm ("movdqu (%1), %%xmm0 \n\t" // copy original round key 663 "movdqu %%xmm0, (%0) \n\t" 664 "add $16, %0 \n\t" 665 "movq 16(%1), %%xmm1 \n\t" 666 "movq %%xmm1, (%0) \n\t" 667 "add $8, %0 \n\t" 668 "jmp 2f \n\t" // skip auxiliary routine 669 670 /* 671 * Finish generating the next 6 quarter-keys. 672 * 673 * On entry xmm0 is r3:r2:r1:r0, xmm1 is stuff:stuff:r5:r4 674 * and xmm2 is stuff:stuff:X:stuff with X = rot( sub( r3 ) ) ^ RCON. 675 * 676 * On exit, xmm0 is r9:r8:r7:r6 and xmm1 is stuff:stuff:r11:r10 677 * and those are written to the round key buffer. 678 */ 679 "1: \n\t" 680 "pshufd $0x55, %%xmm2, %%xmm2 \n\t" // X:X:X:X 681 "pxor %%xmm0, %%xmm2 \n\t" // X+r3:X+r2:X+r1:r4 682 "pslldq $4, %%xmm0 \n\t" // etc 683 "pxor %%xmm0, %%xmm2 \n\t" 684 "pslldq $4, %%xmm0 \n\t" 685 "pxor %%xmm0, %%xmm2 \n\t" 686 "pslldq $4, %%xmm0 \n\t" 687 "pxor %%xmm2, %%xmm0 \n\t" // update xmm0 = r9:r8:r7:r6 688 "movdqu %%xmm0, (%0) \n\t" 689 "add $16, %0 \n\t" 690 "pshufd $0xff, %%xmm0, %%xmm2 \n\t" // r9:r9:r9:r9 691 "pxor %%xmm1, %%xmm2 \n\t" // stuff:stuff:r9+r5:r10 692 "pslldq $4, %%xmm1 \n\t" // r2:r1:r0:0 693 "pxor %%xmm2, %%xmm1 \n\t" // xmm1 = stuff:stuff:r11:r10 694 "movq %%xmm1, (%0) \n\t" 695 "add $8, %0 \n\t" 696 "ret \n\t" 697 698 "2: \n\t" 699 AESKEYGENA(xmm1_xmm2, "0x01") "call 1b \n\t" 700 AESKEYGENA(xmm1_xmm2, "0x02") "call 1b \n\t" 701 AESKEYGENA(xmm1_xmm2, "0x04") "call 1b \n\t" 702 AESKEYGENA(xmm1_xmm2, "0x08") "call 1b \n\t" 703 AESKEYGENA(xmm1_xmm2, "0x10") "call 1b \n\t" 704 AESKEYGENA(xmm1_xmm2, "0x20") "call 1b \n\t" 705 AESKEYGENA(xmm1_xmm2, "0x40") "call 1b \n\t" 706 AESKEYGENA(xmm1_xmm2, "0x80") "call 1b \n\t" 707 708 : 709 : "r" (rk), "r" (key) 710 : "memory", "cc", "0"); 711 } 712 713 /* 714 * Key expansion, 256-bit case 715 */ 716 static void aesni_setkey_enc_256(unsigned char *rk, 717 const unsigned char *key) 718 { 719 asm ("movdqu (%1), %%xmm0 \n\t" 720 "movdqu %%xmm0, (%0) \n\t" 721 "add $16, %0 \n\t" 722 "movdqu 16(%1), %%xmm1 \n\t" 723 "movdqu %%xmm1, (%0) \n\t" 724 "jmp 2f \n\t" // skip auxiliary routine 725 726 /* 727 * Finish generating the next two round keys. 728 * 729 * On entry xmm0 is r3:r2:r1:r0, xmm1 is r7:r6:r5:r4 and 730 * xmm2 is X:stuff:stuff:stuff with X = rot( sub( r7 )) ^ RCON 731 * 732 * On exit, xmm0 is r11:r10:r9:r8 and xmm1 is r15:r14:r13:r12 733 * and those have been written to the output buffer. 734 */ 735 "1: \n\t" 736 "pshufd $0xff, %%xmm2, %%xmm2 \n\t" 737 "pxor %%xmm0, %%xmm2 \n\t" 738 "pslldq $4, %%xmm0 \n\t" 739 "pxor %%xmm0, %%xmm2 \n\t" 740 "pslldq $4, %%xmm0 \n\t" 741 "pxor %%xmm0, %%xmm2 \n\t" 742 "pslldq $4, %%xmm0 \n\t" 743 "pxor %%xmm2, %%xmm0 \n\t" 744 "add $16, %0 \n\t" 745 "movdqu %%xmm0, (%0) \n\t" 746 747 /* Set xmm2 to stuff:Y:stuff:stuff with Y = subword( r11 ) 748 * and proceed to generate next round key from there */ 749 AESKEYGENA(xmm0_xmm2, "0x00") 750 "pshufd $0xaa, %%xmm2, %%xmm2 \n\t" 751 "pxor %%xmm1, %%xmm2 \n\t" 752 "pslldq $4, %%xmm1 \n\t" 753 "pxor %%xmm1, %%xmm2 \n\t" 754 "pslldq $4, %%xmm1 \n\t" 755 "pxor %%xmm1, %%xmm2 \n\t" 756 "pslldq $4, %%xmm1 \n\t" 757 "pxor %%xmm2, %%xmm1 \n\t" 758 "add $16, %0 \n\t" 759 "movdqu %%xmm1, (%0) \n\t" 760 "ret \n\t" 761 762 /* 763 * Main "loop" - Generating one more key than necessary, 764 * see definition of mbedtls_aes_context.buf 765 */ 766 "2: \n\t" 767 AESKEYGENA(xmm1_xmm2, "0x01") "call 1b \n\t" 768 AESKEYGENA(xmm1_xmm2, "0x02") "call 1b \n\t" 769 AESKEYGENA(xmm1_xmm2, "0x04") "call 1b \n\t" 770 AESKEYGENA(xmm1_xmm2, "0x08") "call 1b \n\t" 771 AESKEYGENA(xmm1_xmm2, "0x10") "call 1b \n\t" 772 AESKEYGENA(xmm1_xmm2, "0x20") "call 1b \n\t" 773 AESKEYGENA(xmm1_xmm2, "0x40") "call 1b \n\t" 774 : 775 : "r" (rk), "r" (key) 776 : "memory", "cc", "0"); 777 } 778 779 #endif /* MBEDTLS_AESNI_HAVE_CODE */ 780 781 /* 782 * Key expansion, wrapper 783 */ 784 int mbedtls_aesni_setkey_enc(unsigned char *rk, 785 const unsigned char *key, 786 size_t bits) 787 { 788 switch (bits) { 789 case 128: aesni_setkey_enc_128(rk, key); break; 790 case 192: aesni_setkey_enc_192(rk, key); break; 791 case 256: aesni_setkey_enc_256(rk, key); break; 792 default: return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH; 793 } 794 795 return 0; 796 } 797 798 #endif /* MBEDTLS_AESNI_HAVE_CODE */ 799 800 #endif /* MBEDTLS_AESNI_C */ 801