11bb92983SJerome Forissier /* SPDX-License-Identifier: BSD-2-Clause */ 254e04708SPascal Brand /* 354e04708SPascal Brand * Copyright (c) 2014, STMicroelectronics International N.V. 454e04708SPascal Brand */ 5*fbe66cf8SEtienne Carriere #ifndef __KERNEL_TEE_MISC_H 6*fbe66cf8SEtienne Carriere #define __KERNEL_TEE_MISC_H 754e04708SPascal Brand 8106d8aa6SPascal Brand #include <types_ext.h> 954e04708SPascal Brand 1054e04708SPascal Brand /* 1154e04708SPascal Brand * Macro to derive hex string buffer size from binary buffer size & the 1254e04708SPascal Brand * reverse 1354e04708SPascal Brand */ 1454e04708SPascal Brand #define TEE_B2HS_HSBUF_SIZE(x) ((x) * 2 + 1) 1554e04708SPascal Brand #define TEE_HS2B_BBUF_SIZE(x) ((x + 1) >> 1) 1654e04708SPascal Brand 1754e04708SPascal Brand /* 1854e04708SPascal Brand * binary to hex string buffer 1954e04708SPascal Brand * Returns the number of data bytes written to the hex string 2054e04708SPascal Brand */ 2154e04708SPascal Brand uint32_t tee_b2hs(uint8_t *b, uint8_t *hs, uint32_t blen, uint32_t hslen); 2254e04708SPascal Brand 2354e04708SPascal Brand /* 2454e04708SPascal Brand * hex string to binary buffer 2554e04708SPascal Brand * Returns the number of data bytes written to the bin buffer 2654e04708SPascal Brand */ 2754e04708SPascal Brand uint32_t tee_hs2b(uint8_t *hs, uint8_t *b, uint32_t hslen, uint32_t blen); 2854e04708SPascal Brand 29106d8aa6SPascal Brand /* 30106d8aa6SPascal Brand * Is buffer 'b' inside/outside/overlapping area 'a'? 31106d8aa6SPascal Brand * 32106d8aa6SPascal Brand * core_is_buffer_inside() - return true if buffer is inside memory area 33106d8aa6SPascal Brand * core_is_buffer_outside() - return true if buffer is outside area 34fa530828SPascal Brand * core_is_buffer_intersect() - return true if buffer overlaps area 35fa530828SPascal Brand * 36106d8aa6SPascal Brand * Warning: core_is_buffer_inside(x,x,x,x)==false does NOT mean 37106d8aa6SPascal Brand * core_is_buffer_outside(x,x,x,x)==true. 38106d8aa6SPascal Brand * 39106d8aa6SPascal Brand * Arguments use by each of these routines: 40106d8aa6SPascal Brand * @b - buffer start address (handled has an unsigned offset) 41106d8aa6SPascal Brand * @bl - length (in bytes) of the target buffer 42106d8aa6SPascal Brand * @a - memory area start address (handled has an unsigned offset) 43106d8aa6SPascal Brand * @al - memory area length (in byte) 44106d8aa6SPascal Brand */ 45c3682b1cSJens Wiklander bool core_is_buffer_inside(paddr_t b, paddr_size_t bl, 46c3682b1cSJens Wiklander paddr_t a, paddr_size_t al); 47c3682b1cSJens Wiklander bool core_is_buffer_outside(paddr_t b, paddr_size_t bl, 48c3682b1cSJens Wiklander paddr_t a, paddr_size_t al); 49c3682b1cSJens Wiklander bool core_is_buffer_intersect(paddr_t b, paddr_size_t bl, 50c3682b1cSJens Wiklander paddr_t a, paddr_size_t al); 51106d8aa6SPascal Brand 524682bf0fSVesa Jääskeläinen /** 534682bf0fSVesa Jääskeläinen * Allocate maximum cache line aligned memory buffer. 544682bf0fSVesa Jääskeläinen * 554682bf0fSVesa Jääskeläinen * Both size and base address of the memory buffer will be maximum cache line 564682bf0fSVesa Jääskeläinen * aligned to make it safe to perform cache maintenance operations over the 574682bf0fSVesa Jääskeläinen * allocated area. 584682bf0fSVesa Jääskeläinen * 594682bf0fSVesa Jääskeläinen * This is needed when non-cache coherent peripherals are used and memory area 604682bf0fSVesa Jääskeläinen * is shared between CPU and peripheral. 614682bf0fSVesa Jääskeläinen * 624682bf0fSVesa Jääskeläinen * Allocated memory is zeroed. 634682bf0fSVesa Jääskeläinen * 644682bf0fSVesa Jääskeläinen * Release memory with free(). 654682bf0fSVesa Jääskeläinen * 664682bf0fSVesa Jääskeläinen * @size Size in bytes to allocate 674682bf0fSVesa Jääskeläinen * @return NULL on failure or a pointer to allocated memory on success. 684682bf0fSVesa Jääskeläinen */ 694682bf0fSVesa Jääskeläinen void *alloc_cache_aligned(size_t size); 704682bf0fSVesa Jääskeläinen 71*fbe66cf8SEtienne Carriere #endif /* __KERNEL_TEE_MISC_H */ 72