11bb92983SJerome Forissier /* SPDX-License-Identifier: BSD-2-Clause */ 2b0104773SPascal Brand /* 32d0c93dfSEtienne Carriere * Copyright (c) 2014-2019, Linaro Limited 4b0104773SPascal Brand */ 5b0104773SPascal Brand #ifndef IO_H 6b0104773SPascal Brand #define IO_H 7b0104773SPascal Brand 881801f83SVolodymyr Babchuk #include <compiler.h> 91f70169dSJoakim Bech #include <stdint.h> 10ec219598SPascal Brand #include <types_ext.h> 11685204ebSJens Wiklander #include <utee_defines.h> 121f70169dSJoakim Bech 1381801f83SVolodymyr Babchuk /* 1481801f83SVolodymyr Babchuk * Make sure that compiler reads given variable only once. This is needed 1581801f83SVolodymyr Babchuk * in cases when we have normal shared memory, and this memory can be changed 1681801f83SVolodymyr Babchuk * at any moment. Compiler does not knows about this, so it can optimize memory 1781801f83SVolodymyr Babchuk * access in any way, including repeated read from the same address. This macro 1881801f83SVolodymyr Babchuk * enforces compiler to access memory only once. 1981801f83SVolodymyr Babchuk */ 2081801f83SVolodymyr Babchuk #define READ_ONCE(p) __compiler_atomic_load(&(p)) 2181801f83SVolodymyr Babchuk 222d0c93dfSEtienne Carriere static inline void io_write8(vaddr_t addr, uint8_t val) 23b0104773SPascal Brand { 24b0104773SPascal Brand *(volatile uint8_t *)addr = val; 25b0104773SPascal Brand } 26b0104773SPascal Brand 272d0c93dfSEtienne Carriere static inline void io_write16(vaddr_t addr, uint16_t val) 28b0104773SPascal Brand { 29b0104773SPascal Brand *(volatile uint16_t *)addr = val; 30b0104773SPascal Brand } 31b0104773SPascal Brand 322d0c93dfSEtienne Carriere static inline void io_write32(vaddr_t addr, uint32_t val) 33b0104773SPascal Brand { 34b0104773SPascal Brand *(volatile uint32_t *)addr = val; 35b0104773SPascal Brand } 36b0104773SPascal Brand 372d0c93dfSEtienne Carriere static inline uint8_t io_read8(vaddr_t addr) 38b0104773SPascal Brand { 39b0104773SPascal Brand return *(volatile uint8_t *)addr; 40b0104773SPascal Brand } 41b0104773SPascal Brand 422d0c93dfSEtienne Carriere static inline uint16_t io_read16(vaddr_t addr) 43b0104773SPascal Brand { 44b0104773SPascal Brand return *(volatile uint16_t *)addr; 45b0104773SPascal Brand } 46b0104773SPascal Brand 472d0c93dfSEtienne Carriere static inline uint32_t io_read32(vaddr_t addr) 48b0104773SPascal Brand { 49b0104773SPascal Brand return *(volatile uint32_t *)addr; 50b0104773SPascal Brand } 51b0104773SPascal Brand 5214ed3274SVictor Chong static inline void io_mask8(vaddr_t addr, uint8_t val, uint8_t mask) 5314ed3274SVictor Chong { 542d0c93dfSEtienne Carriere io_write8(addr, (io_read8(addr) & ~mask) | (val & mask)); 5514ed3274SVictor Chong } 5614ed3274SVictor Chong 5714ed3274SVictor Chong static inline void io_mask16(vaddr_t addr, uint16_t val, uint16_t mask) 5814ed3274SVictor Chong { 592d0c93dfSEtienne Carriere io_write16(addr, (io_read16(addr) & ~mask) | (val & mask)); 6014ed3274SVictor Chong } 6114ed3274SVictor Chong 6214ed3274SVictor Chong static inline void io_mask32(vaddr_t addr, uint32_t val, uint32_t mask) 6314ed3274SVictor Chong { 642d0c93dfSEtienne Carriere io_write32(addr, (io_read32(addr) & ~mask) | (val & mask)); 6514ed3274SVictor Chong } 6614ed3274SVictor Chong 67685204ebSJens Wiklander static inline uint64_t get_be64(const void *p) 68685204ebSJens Wiklander { 69685204ebSJens Wiklander return TEE_U64_FROM_BIG_ENDIAN(*(const uint64_t *)p); 70685204ebSJens Wiklander } 71685204ebSJens Wiklander 72685204ebSJens Wiklander static inline void put_be64(void *p, uint64_t val) 73685204ebSJens Wiklander { 74685204ebSJens Wiklander *(uint64_t *)p = TEE_U64_TO_BIG_ENDIAN(val); 75685204ebSJens Wiklander } 76685204ebSJens Wiklander 77685204ebSJens Wiklander static inline uint32_t get_be32(const void *p) 78685204ebSJens Wiklander { 79685204ebSJens Wiklander return TEE_U32_FROM_BIG_ENDIAN(*(const uint32_t *)p); 80685204ebSJens Wiklander } 81685204ebSJens Wiklander 82685204ebSJens Wiklander static inline void put_be32(void *p, uint32_t val) 83685204ebSJens Wiklander { 84685204ebSJens Wiklander *(uint32_t *)p = TEE_U32_TO_BIG_ENDIAN(val); 85685204ebSJens Wiklander } 86685204ebSJens Wiklander 87685204ebSJens Wiklander static inline uint16_t get_be16(const void *p) 88685204ebSJens Wiklander { 89685204ebSJens Wiklander return TEE_U16_FROM_BIG_ENDIAN(*(const uint16_t *)p); 90685204ebSJens Wiklander } 91685204ebSJens Wiklander 92685204ebSJens Wiklander static inline void put_be16(void *p, uint16_t val) 93685204ebSJens Wiklander { 94685204ebSJens Wiklander *(uint16_t *)p = TEE_U16_TO_BIG_ENDIAN(val); 95685204ebSJens Wiklander } 96685204ebSJens Wiklander 97*c22e4872SCedric Neveux static inline void put_le32(const void *p, uint32_t val) 98*c22e4872SCedric Neveux { 99*c22e4872SCedric Neveux *(uint32_t *)p = val; 100*c22e4872SCedric Neveux } 101*c22e4872SCedric Neveux 102*c22e4872SCedric Neveux static inline uint32_t get_le32(const void *p) 103*c22e4872SCedric Neveux { 104*c22e4872SCedric Neveux return *(const uint32_t *)p; 105*c22e4872SCedric Neveux } 106*c22e4872SCedric Neveux 107*c22e4872SCedric Neveux static inline void put_le64(const void *p, uint64_t val) 108*c22e4872SCedric Neveux { 109*c22e4872SCedric Neveux *(uint64_t *)p = val; 110*c22e4872SCedric Neveux } 111*c22e4872SCedric Neveux 112*c22e4872SCedric Neveux static inline uint64_t get_le64(const void *p) 113*c22e4872SCedric Neveux { 114*c22e4872SCedric Neveux return *(const uint64_t *)p; 115*c22e4872SCedric Neveux } 116*c22e4872SCedric Neveux 11754815590SEtienne Carriere /* 11854815590SEtienne Carriere * Set and clear bits helpers. 11954815590SEtienne Carriere * 12054815590SEtienne Carriere * @addr is the address of the memory cell accessed 12154815590SEtienne Carriere * @set_mask represents the bit mask of the bit(s) to set, aka set to 1 12254815590SEtienne Carriere * @clear_mask represents the bit mask of the bit(s) to clear, aka reset to 0 12354815590SEtienne Carriere * 12454815590SEtienne Carriere * io_clrsetbits32() clears then sets the target bits in this order. If a bit 12554815590SEtienne Carriere * position is defined by both @set_mask and @clear_mask, the bit will be set. 12654815590SEtienne Carriere */ 1274d22155cSEtienne Carriere static inline void io_setbits32(vaddr_t addr, uint32_t set_mask) 12854815590SEtienne Carriere { 1292d0c93dfSEtienne Carriere io_write32(addr, io_read32(addr) | set_mask); 13054815590SEtienne Carriere } 13154815590SEtienne Carriere 1324d22155cSEtienne Carriere static inline void io_clrbits32(vaddr_t addr, uint32_t clear_mask) 13354815590SEtienne Carriere { 1342d0c93dfSEtienne Carriere io_write32(addr, io_read32(addr) & ~clear_mask); 13554815590SEtienne Carriere } 13654815590SEtienne Carriere 1374d22155cSEtienne Carriere static inline void io_clrsetbits32(vaddr_t addr, uint32_t clear_mask, 13854815590SEtienne Carriere uint32_t set_mask) 13954815590SEtienne Carriere { 1402d0c93dfSEtienne Carriere io_write32(addr, (io_read32(addr) & ~clear_mask) | set_mask); 1412d0c93dfSEtienne Carriere } 1422d0c93dfSEtienne Carriere 143b7d2b849SEtienne Carriere static inline void io_setbits16(vaddr_t addr, uint16_t set_mask) 144b7d2b849SEtienne Carriere { 145b7d2b849SEtienne Carriere io_write16(addr, io_read16(addr) | set_mask); 146b7d2b849SEtienne Carriere } 147b7d2b849SEtienne Carriere 148b7d2b849SEtienne Carriere static inline void io_clrbits16(vaddr_t addr, uint16_t clear_mask) 149b7d2b849SEtienne Carriere { 150b7d2b849SEtienne Carriere io_write16(addr, io_read16(addr) & ~clear_mask); 151b7d2b849SEtienne Carriere } 152b7d2b849SEtienne Carriere 153b7d2b849SEtienne Carriere static inline void io_clrsetbits16(vaddr_t addr, uint16_t clear_mask, 154b7d2b849SEtienne Carriere uint16_t set_mask) 155b7d2b849SEtienne Carriere { 156b7d2b849SEtienne Carriere io_write16(addr, (io_read16(addr) & ~clear_mask) | set_mask); 157b7d2b849SEtienne Carriere } 158b7d2b849SEtienne Carriere 159b7d2b849SEtienne Carriere static inline void io_setbits8(vaddr_t addr, uint8_t set_mask) 160b7d2b849SEtienne Carriere { 161b7d2b849SEtienne Carriere io_write8(addr, io_read8(addr) | set_mask); 162b7d2b849SEtienne Carriere } 163b7d2b849SEtienne Carriere 164b7d2b849SEtienne Carriere static inline void io_clrbits8(vaddr_t addr, uint8_t clear_mask) 165b7d2b849SEtienne Carriere { 166b7d2b849SEtienne Carriere io_write8(addr, io_read8(addr) & ~clear_mask); 167b7d2b849SEtienne Carriere } 168b7d2b849SEtienne Carriere 169b7d2b849SEtienne Carriere static inline void io_clrsetbits8(vaddr_t addr, uint8_t clear_mask, 170b7d2b849SEtienne Carriere uint8_t set_mask) 171b7d2b849SEtienne Carriere { 172b7d2b849SEtienne Carriere io_write8(addr, (io_read8(addr) & ~clear_mask) | set_mask); 173b7d2b849SEtienne Carriere } 174b7d2b849SEtienne Carriere 175b0104773SPascal Brand #endif /*IO_H*/ 176