11bb92983SJerome Forissier /* SPDX-License-Identifier: BSD-2-Clause */ 2b0104773SPascal Brand /* 32d0c93dfSEtienne Carriere * Copyright (c) 2014-2019, Linaro Limited 4b0104773SPascal Brand */ 5b0104773SPascal Brand #ifndef IO_H 6b0104773SPascal Brand #define IO_H 7b0104773SPascal Brand 881801f83SVolodymyr Babchuk #include <compiler.h> 91f70169dSJoakim Bech #include <stdint.h> 10ec219598SPascal Brand #include <types_ext.h> 11685204ebSJens Wiklander #include <utee_defines.h> 121f70169dSJoakim Bech 1381801f83SVolodymyr Babchuk /* 14*4d3ad62dSEtienne Carriere * Make sure that compiler reads/writes given variable only once. This is needed 1581801f83SVolodymyr Babchuk * in cases when we have normal shared memory, and this memory can be changed 1681801f83SVolodymyr Babchuk * at any moment. Compiler does not knows about this, so it can optimize memory 17*4d3ad62dSEtienne Carriere * access in any way, including repeated accesses from the same address. 18*4d3ad62dSEtienne Carriere * These macro enforce compiler to access memory only once. 1981801f83SVolodymyr Babchuk */ 2081801f83SVolodymyr Babchuk #define READ_ONCE(p) __compiler_atomic_load(&(p)) 21*4d3ad62dSEtienne Carriere #define WRITE_ONCE(p, v) __compiler_atomic_store(&(p), (v)) 2281801f83SVolodymyr Babchuk 232d0c93dfSEtienne Carriere static inline void io_write8(vaddr_t addr, uint8_t val) 24b0104773SPascal Brand { 25b0104773SPascal Brand *(volatile uint8_t *)addr = val; 26b0104773SPascal Brand } 27b0104773SPascal Brand 282d0c93dfSEtienne Carriere static inline void io_write16(vaddr_t addr, uint16_t val) 29b0104773SPascal Brand { 30b0104773SPascal Brand *(volatile uint16_t *)addr = val; 31b0104773SPascal Brand } 32b0104773SPascal Brand 332d0c93dfSEtienne Carriere static inline void io_write32(vaddr_t addr, uint32_t val) 34b0104773SPascal Brand { 35b0104773SPascal Brand *(volatile uint32_t *)addr = val; 36b0104773SPascal Brand } 37b0104773SPascal Brand 382d0c93dfSEtienne Carriere static inline uint8_t io_read8(vaddr_t addr) 39b0104773SPascal Brand { 40b0104773SPascal Brand return *(volatile uint8_t *)addr; 41b0104773SPascal Brand } 42b0104773SPascal Brand 432d0c93dfSEtienne Carriere static inline uint16_t io_read16(vaddr_t addr) 44b0104773SPascal Brand { 45b0104773SPascal Brand return *(volatile uint16_t *)addr; 46b0104773SPascal Brand } 47b0104773SPascal Brand 482d0c93dfSEtienne Carriere static inline uint32_t io_read32(vaddr_t addr) 49b0104773SPascal Brand { 50b0104773SPascal Brand return *(volatile uint32_t *)addr; 51b0104773SPascal Brand } 52b0104773SPascal Brand 5314ed3274SVictor Chong static inline void io_mask8(vaddr_t addr, uint8_t val, uint8_t mask) 5414ed3274SVictor Chong { 552d0c93dfSEtienne Carriere io_write8(addr, (io_read8(addr) & ~mask) | (val & mask)); 5614ed3274SVictor Chong } 5714ed3274SVictor Chong 5814ed3274SVictor Chong static inline void io_mask16(vaddr_t addr, uint16_t val, uint16_t mask) 5914ed3274SVictor Chong { 602d0c93dfSEtienne Carriere io_write16(addr, (io_read16(addr) & ~mask) | (val & mask)); 6114ed3274SVictor Chong } 6214ed3274SVictor Chong 6314ed3274SVictor Chong static inline void io_mask32(vaddr_t addr, uint32_t val, uint32_t mask) 6414ed3274SVictor Chong { 652d0c93dfSEtienne Carriere io_write32(addr, (io_read32(addr) & ~mask) | (val & mask)); 6614ed3274SVictor Chong } 6714ed3274SVictor Chong 68685204ebSJens Wiklander static inline uint64_t get_be64(const void *p) 69685204ebSJens Wiklander { 70685204ebSJens Wiklander return TEE_U64_FROM_BIG_ENDIAN(*(const uint64_t *)p); 71685204ebSJens Wiklander } 72685204ebSJens Wiklander 73685204ebSJens Wiklander static inline void put_be64(void *p, uint64_t val) 74685204ebSJens Wiklander { 75685204ebSJens Wiklander *(uint64_t *)p = TEE_U64_TO_BIG_ENDIAN(val); 76685204ebSJens Wiklander } 77685204ebSJens Wiklander 78685204ebSJens Wiklander static inline uint32_t get_be32(const void *p) 79685204ebSJens Wiklander { 80685204ebSJens Wiklander return TEE_U32_FROM_BIG_ENDIAN(*(const uint32_t *)p); 81685204ebSJens Wiklander } 82685204ebSJens Wiklander 83685204ebSJens Wiklander static inline void put_be32(void *p, uint32_t val) 84685204ebSJens Wiklander { 85685204ebSJens Wiklander *(uint32_t *)p = TEE_U32_TO_BIG_ENDIAN(val); 86685204ebSJens Wiklander } 87685204ebSJens Wiklander 88685204ebSJens Wiklander static inline uint16_t get_be16(const void *p) 89685204ebSJens Wiklander { 90685204ebSJens Wiklander return TEE_U16_FROM_BIG_ENDIAN(*(const uint16_t *)p); 91685204ebSJens Wiklander } 92685204ebSJens Wiklander 93685204ebSJens Wiklander static inline void put_be16(void *p, uint16_t val) 94685204ebSJens Wiklander { 95685204ebSJens Wiklander *(uint16_t *)p = TEE_U16_TO_BIG_ENDIAN(val); 96685204ebSJens Wiklander } 97685204ebSJens Wiklander 98c22e4872SCedric Neveux static inline void put_le32(const void *p, uint32_t val) 99c22e4872SCedric Neveux { 100c22e4872SCedric Neveux *(uint32_t *)p = val; 101c22e4872SCedric Neveux } 102c22e4872SCedric Neveux 103c22e4872SCedric Neveux static inline uint32_t get_le32(const void *p) 104c22e4872SCedric Neveux { 105c22e4872SCedric Neveux return *(const uint32_t *)p; 106c22e4872SCedric Neveux } 107c22e4872SCedric Neveux 108c22e4872SCedric Neveux static inline void put_le64(const void *p, uint64_t val) 109c22e4872SCedric Neveux { 110c22e4872SCedric Neveux *(uint64_t *)p = val; 111c22e4872SCedric Neveux } 112c22e4872SCedric Neveux 113c22e4872SCedric Neveux static inline uint64_t get_le64(const void *p) 114c22e4872SCedric Neveux { 115c22e4872SCedric Neveux return *(const uint64_t *)p; 116c22e4872SCedric Neveux } 117c22e4872SCedric Neveux 11854815590SEtienne Carriere /* 11954815590SEtienne Carriere * Set and clear bits helpers. 12054815590SEtienne Carriere * 12154815590SEtienne Carriere * @addr is the address of the memory cell accessed 12254815590SEtienne Carriere * @set_mask represents the bit mask of the bit(s) to set, aka set to 1 12354815590SEtienne Carriere * @clear_mask represents the bit mask of the bit(s) to clear, aka reset to 0 12454815590SEtienne Carriere * 12554815590SEtienne Carriere * io_clrsetbits32() clears then sets the target bits in this order. If a bit 12654815590SEtienne Carriere * position is defined by both @set_mask and @clear_mask, the bit will be set. 12754815590SEtienne Carriere */ 1284d22155cSEtienne Carriere static inline void io_setbits32(vaddr_t addr, uint32_t set_mask) 12954815590SEtienne Carriere { 1302d0c93dfSEtienne Carriere io_write32(addr, io_read32(addr) | set_mask); 13154815590SEtienne Carriere } 13254815590SEtienne Carriere 1334d22155cSEtienne Carriere static inline void io_clrbits32(vaddr_t addr, uint32_t clear_mask) 13454815590SEtienne Carriere { 1352d0c93dfSEtienne Carriere io_write32(addr, io_read32(addr) & ~clear_mask); 13654815590SEtienne Carriere } 13754815590SEtienne Carriere 1384d22155cSEtienne Carriere static inline void io_clrsetbits32(vaddr_t addr, uint32_t clear_mask, 13954815590SEtienne Carriere uint32_t set_mask) 14054815590SEtienne Carriere { 1412d0c93dfSEtienne Carriere io_write32(addr, (io_read32(addr) & ~clear_mask) | set_mask); 1422d0c93dfSEtienne Carriere } 1432d0c93dfSEtienne Carriere 144b7d2b849SEtienne Carriere static inline void io_setbits16(vaddr_t addr, uint16_t set_mask) 145b7d2b849SEtienne Carriere { 146b7d2b849SEtienne Carriere io_write16(addr, io_read16(addr) | set_mask); 147b7d2b849SEtienne Carriere } 148b7d2b849SEtienne Carriere 149b7d2b849SEtienne Carriere static inline void io_clrbits16(vaddr_t addr, uint16_t clear_mask) 150b7d2b849SEtienne Carriere { 151b7d2b849SEtienne Carriere io_write16(addr, io_read16(addr) & ~clear_mask); 152b7d2b849SEtienne Carriere } 153b7d2b849SEtienne Carriere 154b7d2b849SEtienne Carriere static inline void io_clrsetbits16(vaddr_t addr, uint16_t clear_mask, 155b7d2b849SEtienne Carriere uint16_t set_mask) 156b7d2b849SEtienne Carriere { 157b7d2b849SEtienne Carriere io_write16(addr, (io_read16(addr) & ~clear_mask) | set_mask); 158b7d2b849SEtienne Carriere } 159b7d2b849SEtienne Carriere 160b7d2b849SEtienne Carriere static inline void io_setbits8(vaddr_t addr, uint8_t set_mask) 161b7d2b849SEtienne Carriere { 162b7d2b849SEtienne Carriere io_write8(addr, io_read8(addr) | set_mask); 163b7d2b849SEtienne Carriere } 164b7d2b849SEtienne Carriere 165b7d2b849SEtienne Carriere static inline void io_clrbits8(vaddr_t addr, uint8_t clear_mask) 166b7d2b849SEtienne Carriere { 167b7d2b849SEtienne Carriere io_write8(addr, io_read8(addr) & ~clear_mask); 168b7d2b849SEtienne Carriere } 169b7d2b849SEtienne Carriere 170b7d2b849SEtienne Carriere static inline void io_clrsetbits8(vaddr_t addr, uint8_t clear_mask, 171b7d2b849SEtienne Carriere uint8_t set_mask) 172b7d2b849SEtienne Carriere { 173b7d2b849SEtienne Carriere io_write8(addr, (io_read8(addr) & ~clear_mask) | set_mask); 174b7d2b849SEtienne Carriere } 175b7d2b849SEtienne Carriere 176b0104773SPascal Brand #endif /*IO_H*/ 177