11bb92983SJerome Forissier /* SPDX-License-Identifier: BSD-2-Clause */ 2b0104773SPascal Brand /* 3*2d0c93dfSEtienne Carriere * Copyright (c) 2014-2019, Linaro Limited 4b0104773SPascal Brand */ 5b0104773SPascal Brand #ifndef IO_H 6b0104773SPascal Brand #define IO_H 7b0104773SPascal Brand 881801f83SVolodymyr Babchuk #include <compiler.h> 91f70169dSJoakim Bech #include <stdint.h> 10ec219598SPascal Brand #include <types_ext.h> 11685204ebSJens Wiklander #include <utee_defines.h> 121f70169dSJoakim Bech 1381801f83SVolodymyr Babchuk /* 1481801f83SVolodymyr Babchuk * Make sure that compiler reads given variable only once. This is needed 1581801f83SVolodymyr Babchuk * in cases when we have normal shared memory, and this memory can be changed 1681801f83SVolodymyr Babchuk * at any moment. Compiler does not knows about this, so it can optimize memory 1781801f83SVolodymyr Babchuk * access in any way, including repeated read from the same address. This macro 1881801f83SVolodymyr Babchuk * enforces compiler to access memory only once. 1981801f83SVolodymyr Babchuk */ 2081801f83SVolodymyr Babchuk #define READ_ONCE(p) __compiler_atomic_load(&(p)) 2181801f83SVolodymyr Babchuk 22*2d0c93dfSEtienne Carriere static inline void io_write8(vaddr_t addr, uint8_t val) 23b0104773SPascal Brand { 24b0104773SPascal Brand *(volatile uint8_t *)addr = val; 25b0104773SPascal Brand } 26b0104773SPascal Brand 27*2d0c93dfSEtienne Carriere static inline void io_write16(vaddr_t addr, uint16_t val) 28b0104773SPascal Brand { 29b0104773SPascal Brand *(volatile uint16_t *)addr = val; 30b0104773SPascal Brand } 31b0104773SPascal Brand 32*2d0c93dfSEtienne Carriere static inline void io_write32(vaddr_t addr, uint32_t val) 33b0104773SPascal Brand { 34b0104773SPascal Brand *(volatile uint32_t *)addr = val; 35b0104773SPascal Brand } 36b0104773SPascal Brand 37*2d0c93dfSEtienne Carriere static inline uint8_t io_read8(vaddr_t addr) 38b0104773SPascal Brand { 39b0104773SPascal Brand return *(volatile uint8_t *)addr; 40b0104773SPascal Brand } 41b0104773SPascal Brand 42*2d0c93dfSEtienne Carriere static inline uint16_t io_read16(vaddr_t addr) 43b0104773SPascal Brand { 44b0104773SPascal Brand return *(volatile uint16_t *)addr; 45b0104773SPascal Brand } 46b0104773SPascal Brand 47*2d0c93dfSEtienne Carriere static inline uint32_t io_read32(vaddr_t addr) 48b0104773SPascal Brand { 49b0104773SPascal Brand return *(volatile uint32_t *)addr; 50b0104773SPascal Brand } 51b0104773SPascal Brand 5214ed3274SVictor Chong static inline void io_mask8(vaddr_t addr, uint8_t val, uint8_t mask) 5314ed3274SVictor Chong { 54*2d0c93dfSEtienne Carriere io_write8(addr, (io_read8(addr) & ~mask) | (val & mask)); 5514ed3274SVictor Chong } 5614ed3274SVictor Chong 5714ed3274SVictor Chong static inline void io_mask16(vaddr_t addr, uint16_t val, uint16_t mask) 5814ed3274SVictor Chong { 59*2d0c93dfSEtienne Carriere io_write16(addr, (io_read16(addr) & ~mask) | (val & mask)); 6014ed3274SVictor Chong } 6114ed3274SVictor Chong 6214ed3274SVictor Chong static inline void io_mask32(vaddr_t addr, uint32_t val, uint32_t mask) 6314ed3274SVictor Chong { 64*2d0c93dfSEtienne Carriere io_write32(addr, (io_read32(addr) & ~mask) | (val & mask)); 6514ed3274SVictor Chong } 6614ed3274SVictor Chong 67685204ebSJens Wiklander static inline uint64_t get_be64(const void *p) 68685204ebSJens Wiklander { 69685204ebSJens Wiklander return TEE_U64_FROM_BIG_ENDIAN(*(const uint64_t *)p); 70685204ebSJens Wiklander } 71685204ebSJens Wiklander 72685204ebSJens Wiklander static inline void put_be64(void *p, uint64_t val) 73685204ebSJens Wiklander { 74685204ebSJens Wiklander *(uint64_t *)p = TEE_U64_TO_BIG_ENDIAN(val); 75685204ebSJens Wiklander } 76685204ebSJens Wiklander 77685204ebSJens Wiklander static inline uint32_t get_be32(const void *p) 78685204ebSJens Wiklander { 79685204ebSJens Wiklander return TEE_U32_FROM_BIG_ENDIAN(*(const uint32_t *)p); 80685204ebSJens Wiklander } 81685204ebSJens Wiklander 82685204ebSJens Wiklander static inline void put_be32(void *p, uint32_t val) 83685204ebSJens Wiklander { 84685204ebSJens Wiklander *(uint32_t *)p = TEE_U32_TO_BIG_ENDIAN(val); 85685204ebSJens Wiklander } 86685204ebSJens Wiklander 87685204ebSJens Wiklander static inline uint16_t get_be16(const void *p) 88685204ebSJens Wiklander { 89685204ebSJens Wiklander return TEE_U16_FROM_BIG_ENDIAN(*(const uint16_t *)p); 90685204ebSJens Wiklander } 91685204ebSJens Wiklander 92685204ebSJens Wiklander static inline void put_be16(void *p, uint16_t val) 93685204ebSJens Wiklander { 94685204ebSJens Wiklander *(uint16_t *)p = TEE_U16_TO_BIG_ENDIAN(val); 95685204ebSJens Wiklander } 96685204ebSJens Wiklander 9754815590SEtienne Carriere /* 9854815590SEtienne Carriere * Set and clear bits helpers. 9954815590SEtienne Carriere * 10054815590SEtienne Carriere * @addr is the address of the memory cell accessed 10154815590SEtienne Carriere * @set_mask represents the bit mask of the bit(s) to set, aka set to 1 10254815590SEtienne Carriere * @clear_mask represents the bit mask of the bit(s) to clear, aka reset to 0 10354815590SEtienne Carriere * 10454815590SEtienne Carriere * io_clrsetbits32() clears then sets the target bits in this order. If a bit 10554815590SEtienne Carriere * position is defined by both @set_mask and @clear_mask, the bit will be set. 10654815590SEtienne Carriere */ 1074d22155cSEtienne Carriere static inline void io_setbits32(vaddr_t addr, uint32_t set_mask) 10854815590SEtienne Carriere { 109*2d0c93dfSEtienne Carriere io_write32(addr, io_read32(addr) | set_mask); 11054815590SEtienne Carriere } 11154815590SEtienne Carriere 1124d22155cSEtienne Carriere static inline void io_clrbits32(vaddr_t addr, uint32_t clear_mask) 11354815590SEtienne Carriere { 114*2d0c93dfSEtienne Carriere io_write32(addr, io_read32(addr) & ~clear_mask); 11554815590SEtienne Carriere } 11654815590SEtienne Carriere 1174d22155cSEtienne Carriere static inline void io_clrsetbits32(vaddr_t addr, uint32_t clear_mask, 11854815590SEtienne Carriere uint32_t set_mask) 11954815590SEtienne Carriere { 120*2d0c93dfSEtienne Carriere io_write32(addr, (io_read32(addr) & ~clear_mask) | set_mask); 121*2d0c93dfSEtienne Carriere } 122*2d0c93dfSEtienne Carriere 123*2d0c93dfSEtienne Carriere /* 124*2d0c93dfSEtienne Carriere * Functions write8(), write16(), write32(), read8(), read16() and read32() 125*2d0c93dfSEtienne Carriere * will be deprecated in OP-TEE release 3.5.0. 126*2d0c93dfSEtienne Carriere * 127*2d0c93dfSEtienne Carriere * Main issue is the swapping position of address and value arguments 128*2d0c93dfSEtienne Carriere * of write{8|16|32}() regarding other util functions io_mask*(), 129*2d0c93dfSEtienne Carriere * io_*bits32() and put_be*(). 130*2d0c93dfSEtienne Carriere */ 131*2d0c93dfSEtienne Carriere static inline void write8(uint8_t val, vaddr_t addr) 132*2d0c93dfSEtienne Carriere { 133*2d0c93dfSEtienne Carriere io_write8(addr, val); 134*2d0c93dfSEtienne Carriere } 135*2d0c93dfSEtienne Carriere 136*2d0c93dfSEtienne Carriere static inline void write16(uint16_t val, vaddr_t addr) 137*2d0c93dfSEtienne Carriere { 138*2d0c93dfSEtienne Carriere io_write16(addr, val); 139*2d0c93dfSEtienne Carriere } 140*2d0c93dfSEtienne Carriere 141*2d0c93dfSEtienne Carriere static inline void write32(uint32_t val, vaddr_t addr) 142*2d0c93dfSEtienne Carriere { 143*2d0c93dfSEtienne Carriere io_write32(addr, val); 144*2d0c93dfSEtienne Carriere } 145*2d0c93dfSEtienne Carriere 146*2d0c93dfSEtienne Carriere static inline uint8_t read8(vaddr_t addr) 147*2d0c93dfSEtienne Carriere { 148*2d0c93dfSEtienne Carriere return io_read8(addr); 149*2d0c93dfSEtienne Carriere } 150*2d0c93dfSEtienne Carriere 151*2d0c93dfSEtienne Carriere static inline uint16_t read16(vaddr_t addr) 152*2d0c93dfSEtienne Carriere { 153*2d0c93dfSEtienne Carriere return io_read16(addr); 154*2d0c93dfSEtienne Carriere } 155*2d0c93dfSEtienne Carriere 156*2d0c93dfSEtienne Carriere static inline uint32_t read32(vaddr_t addr) 157*2d0c93dfSEtienne Carriere { 158*2d0c93dfSEtienne Carriere return io_read32(addr); 15954815590SEtienne Carriere } 16054815590SEtienne Carriere 161b0104773SPascal Brand #endif /*IO_H*/ 162