xref: /optee_os/core/include/dt-bindings/tamper/st,stm32mp13-tamp.h (revision d7272dd55f0bc444c7bdb60884c62aa5105b785e)
1*d7272dd5SGatien Chevallier /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
2*d7272dd5SGatien Chevallier /*
3*d7272dd5SGatien Chevallier  * Copyright (C) STMicroelectronics 2023-2025 - All Rights Reserved
4*d7272dd5SGatien Chevallier  * Author: Gatien Chevallier <gatien.chevallier@foss.st.com>
5*d7272dd5SGatien Chevallier  */
6*d7272dd5SGatien Chevallier 
7*d7272dd5SGatien Chevallier #ifndef _DT_BINDINGS_TAMPER_ST_STM32MP13_TAMP_H_
8*d7272dd5SGatien Chevallier #define _DT_BINDINGS_TAMPER_ST_STM32MP13_TAMP_H_
9*d7272dd5SGatien Chevallier 
10*d7272dd5SGatien Chevallier /* Internal Tampers */
11*d7272dd5SGatien Chevallier #define INT_TAMPER_BKUP_DOMAIN_THRESHOLD	1
12*d7272dd5SGatien Chevallier #define INT_TAMPER_TEMPERATURE_MONITORING	2
13*d7272dd5SGatien Chevallier #define INT_TAMPER_LSE_MONITORING		3
14*d7272dd5SGatien Chevallier #define INT_TAMPER_HSE_MONITORING		4
15*d7272dd5SGatien Chevallier #define INT_TAMPER_RTC_CALENDAR_OVERFLOW	5
16*d7272dd5SGatien Chevallier #define INT_TAMPER_JTAG_SWD_ACCESS		6
17*d7272dd5SGatien Chevallier #define INT_TAMPER_ADC2_AWD_MONITORING_1	7
18*d7272dd5SGatien Chevallier #define INT_TAMPER_MONOTONIC_COUNTER_1		8
19*d7272dd5SGatien Chevallier #define INT_TAMPER_CRYPTO_PERIPH_FAULT		9
20*d7272dd5SGatien Chevallier #define INT_TAMPER_MONOTONIC_COUNTER_2		10
21*d7272dd5SGatien Chevallier #define INT_TAMPER_IWDG1_RESET			11
22*d7272dd5SGatien Chevallier #define INT_TAMPER_ADC2_AWD_MONITORING_2	12
23*d7272dd5SGatien Chevallier #define INT_TAMPER_ADC2_AWD_MONITORING_3	13
24*d7272dd5SGatien Chevallier 
25*d7272dd5SGatien Chevallier /* External Tampers */
26*d7272dd5SGatien Chevallier #define EXT_TAMPER_1				1
27*d7272dd5SGatien Chevallier #define EXT_TAMPER_2				2
28*d7272dd5SGatien Chevallier #define EXT_TAMPER_3				3
29*d7272dd5SGatien Chevallier #define EXT_TAMPER_4				4
30*d7272dd5SGatien Chevallier #define EXT_TAMPER_5				5
31*d7272dd5SGatien Chevallier #define EXT_TAMPER_6				6
32*d7272dd5SGatien Chevallier #define EXT_TAMPER_7				7
33*d7272dd5SGatien Chevallier #define EXT_TAMPER_8				8
34*d7272dd5SGatien Chevallier 
35*d7272dd5SGatien Chevallier /* Tamper mode */
36*d7272dd5SGatien Chevallier #define TAMPER_CONFIRMED_MODE			1
37*d7272dd5SGatien Chevallier #define TAMPER_POTENTIAL_MODE			2
38*d7272dd5SGatien Chevallier 
39*d7272dd5SGatien Chevallier #endif /* _DT_BINDINGS_TAMPER_ST_STM32MP13_TAMP_H_ */
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