xref: /optee_os/core/include/dt-bindings/tamper/st,stm32-tamp.h (revision d7272dd55f0bc444c7bdb60884c62aa5105b785e)
1*d7272dd5SGatien Chevallier /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
2*d7272dd5SGatien Chevallier /*
3*d7272dd5SGatien Chevallier  * Copyright (C) STMicroelectronics 2023-2025 - All Rights Reserved
4*d7272dd5SGatien Chevallier  * Author: Gatien Chevallier <gatien.chevallier@foss.st.com>
5*d7272dd5SGatien Chevallier  */
6*d7272dd5SGatien Chevallier 
7*d7272dd5SGatien Chevallier #ifndef _DT_BINDINGS_TAMPER_ST_STM32_TAMP_H_
8*d7272dd5SGatien Chevallier #define _DT_BINDINGS_TAMPER_ST_STM32_TAMP_H_
9*d7272dd5SGatien Chevallier 
10*d7272dd5SGatien Chevallier /* Internal Tampers */
11*d7272dd5SGatien Chevallier #define INT_TAMPER_RTC_VOLTAGE_MONITORING	1
12*d7272dd5SGatien Chevallier #define INT_TAMPER_TEMPERATURE_MONITORING	2
13*d7272dd5SGatien Chevallier #define INT_TAMPER_LSE_MONITORING		3
14*d7272dd5SGatien Chevallier #define INT_TAMPER_HSE_MONITORING		4
15*d7272dd5SGatien Chevallier #define INT_TAMPER_RTC_CALENDAR_OVERFLOW	5
16*d7272dd5SGatien Chevallier /* Nothing for tampers 6-7 */
17*d7272dd5SGatien Chevallier #define INT_TAMPER_6				6
18*d7272dd5SGatien Chevallier #define INT_TAMPER_7				7
19*d7272dd5SGatien Chevallier #define INT_TAMPER_MONOTONIC_COUNTER		8
20*d7272dd5SGatien Chevallier 
21*d7272dd5SGatien Chevallier /* External Tampers */
22*d7272dd5SGatien Chevallier #define EXT_TAMPER_1				1
23*d7272dd5SGatien Chevallier #define EXT_TAMPER_2				2
24*d7272dd5SGatien Chevallier #define EXT_TAMPER_3				3
25*d7272dd5SGatien Chevallier 
26*d7272dd5SGatien Chevallier /* Tamper mode */
27*d7272dd5SGatien Chevallier #define TAMPER_CONFIRMED_MODE			1
28*d7272dd5SGatien Chevallier #define TAMPER_POTENTIAL_MODE			2
29*d7272dd5SGatien Chevallier 
30*d7272dd5SGatien Chevallier #endif /* _DT_BINDINGS_TAMPER_ST_STM32_TAMP_H_ */
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