xref: /optee_os/core/include/dt-bindings/reset/stm32mp13-resets.h (revision b46e2b4d1375760a7683d75081ee6d6cb586eb04)
119a4632eSGabriel Fernandez /* SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause */
219a4632eSGabriel Fernandez /*
319a4632eSGabriel Fernandez  * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
419a4632eSGabriel Fernandez  * Author: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
519a4632eSGabriel Fernandez  */
619a4632eSGabriel Fernandez 
719a4632eSGabriel Fernandez #ifndef _DT_BINDINGS_STM32MP13_RESET_H_
819a4632eSGabriel Fernandez #define _DT_BINDINGS_STM32MP13_RESET_H_
919a4632eSGabriel Fernandez 
10*b46e2b4dSEtienne Carriere #define MPSYST_R	2208
1119a4632eSGabriel Fernandez #define TIM2_R		13568
1219a4632eSGabriel Fernandez #define TIM3_R		13569
1319a4632eSGabriel Fernandez #define TIM4_R		13570
1419a4632eSGabriel Fernandez #define TIM5_R		13571
1519a4632eSGabriel Fernandez #define TIM6_R		13572
1619a4632eSGabriel Fernandez #define TIM7_R		13573
1719a4632eSGabriel Fernandez #define LPTIM1_R	13577
1819a4632eSGabriel Fernandez #define SPI2_R		13579
1919a4632eSGabriel Fernandez #define SPI3_R		13580
2019a4632eSGabriel Fernandez #define USART3_R	13583
2119a4632eSGabriel Fernandez #define UART4_R		13584
2219a4632eSGabriel Fernandez #define UART5_R		13585
2319a4632eSGabriel Fernandez #define UART7_R		13586
2419a4632eSGabriel Fernandez #define UART8_R		13587
2519a4632eSGabriel Fernandez #define I2C1_R		13589
2619a4632eSGabriel Fernandez #define I2C2_R		13590
2719a4632eSGabriel Fernandez #define SPDIF_R		13594
2819a4632eSGabriel Fernandez #define TIM1_R		13632
2919a4632eSGabriel Fernandez #define TIM8_R		13633
3019a4632eSGabriel Fernandez #define SPI1_R		13640
3119a4632eSGabriel Fernandez #define USART6_R	13645
3219a4632eSGabriel Fernandez #define SAI1_R		13648
3319a4632eSGabriel Fernandez #define SAI2_R		13649
3419a4632eSGabriel Fernandez #define DFSDM_R		13652
3519a4632eSGabriel Fernandez #define FDCAN_R		13656
3619a4632eSGabriel Fernandez #define LPTIM2_R	13696
3719a4632eSGabriel Fernandez #define LPTIM3_R	13697
3819a4632eSGabriel Fernandez #define LPTIM4_R	13698
3919a4632eSGabriel Fernandez #define LPTIM5_R	13699
4019a4632eSGabriel Fernandez #define SYSCFG_R	13707
4119a4632eSGabriel Fernandez #define VREF_R		13709
4219a4632eSGabriel Fernandez #define DTS_R		13712
4319a4632eSGabriel Fernandez #define PMBCTRL_R	13713
4419a4632eSGabriel Fernandez #define LTDC_R		13760
4519a4632eSGabriel Fernandez #define DCMIPP_R	13761
4619a4632eSGabriel Fernandez #define DDRPERFM_R	13768
4719a4632eSGabriel Fernandez #define USBPHY_R	13776
4819a4632eSGabriel Fernandez #define STGEN_R		13844
4919a4632eSGabriel Fernandez #define USART1_R	13888
5019a4632eSGabriel Fernandez #define USART2_R	13889
5119a4632eSGabriel Fernandez #define SPI4_R		13890
5219a4632eSGabriel Fernandez #define SPI5_R		13891
5319a4632eSGabriel Fernandez #define I2C3_R		13892
5419a4632eSGabriel Fernandez #define I2C4_R		13893
5519a4632eSGabriel Fernandez #define I2C5_R		13894
5619a4632eSGabriel Fernandez #define TIM12_R		13895
5719a4632eSGabriel Fernandez #define TIM13_R		13896
5819a4632eSGabriel Fernandez #define TIM14_R		13897
5919a4632eSGabriel Fernandez #define TIM15_R		13898
6019a4632eSGabriel Fernandez #define TIM16_R		13899
6119a4632eSGabriel Fernandez #define TIM17_R		13900
6219a4632eSGabriel Fernandez #define DMA1_R		13952
6319a4632eSGabriel Fernandez #define DMA2_R		13953
6419a4632eSGabriel Fernandez #define DMAMUX1_R	13954
6519a4632eSGabriel Fernandez #define DMA3_R		13955
6619a4632eSGabriel Fernandez #define DMAMUX2_R	13956
6719a4632eSGabriel Fernandez #define ADC1_R		13957
6819a4632eSGabriel Fernandez #define ADC2_R		13958
6919a4632eSGabriel Fernandez #define USBO_R		13960
7019a4632eSGabriel Fernandez #define GPIOA_R		14080
7119a4632eSGabriel Fernandez #define GPIOB_R		14081
7219a4632eSGabriel Fernandez #define GPIOC_R		14082
7319a4632eSGabriel Fernandez #define GPIOD_R		14083
7419a4632eSGabriel Fernandez #define GPIOE_R		14084
7519a4632eSGabriel Fernandez #define GPIOF_R		14085
7619a4632eSGabriel Fernandez #define GPIOG_R		14086
7719a4632eSGabriel Fernandez #define GPIOH_R		14087
7819a4632eSGabriel Fernandez #define GPIOI_R		14088
7919a4632eSGabriel Fernandez #define TSC_R		14095
8019a4632eSGabriel Fernandez #define PKA_R		14146
8119a4632eSGabriel Fernandez #define SAES_R		14147
8219a4632eSGabriel Fernandez #define CRYP1_R		14148
8319a4632eSGabriel Fernandez #define HASH1_R		14149
8419a4632eSGabriel Fernandez #define RNG1_R		14150
8519a4632eSGabriel Fernandez #define AXIMC_R		14160
8619a4632eSGabriel Fernandez #define MDMA_R		14208
8719a4632eSGabriel Fernandez #define MCE_R		14209
8819a4632eSGabriel Fernandez #define ETH1MAC_R	14218
8919a4632eSGabriel Fernandez #define FMC_R		14220
9019a4632eSGabriel Fernandez #define QSPI_R		14222
9119a4632eSGabriel Fernandez #define SDMMC1_R	14224
9219a4632eSGabriel Fernandez #define SDMMC2_R	14225
9319a4632eSGabriel Fernandez #define CRC1_R		14228
9419a4632eSGabriel Fernandez #define USBH_R		14232
9519a4632eSGabriel Fernandez #define ETH2MAC_R	14238
9619a4632eSGabriel Fernandez 
9719a4632eSGabriel Fernandez /* SCMI reset domain identifiers */
9819a4632eSGabriel Fernandez #define RST_SCMI_LTDC		0
9919a4632eSGabriel Fernandez #define RST_SCMI_MDMA		1
10019a4632eSGabriel Fernandez 
10119a4632eSGabriel Fernandez #endif /* _DT_BINDINGS_STM32MP13_RESET_H_ */
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