xref: /optee_os/core/include/dt-bindings/pinctrl/stm32-pinfunc.h (revision 0ef3a5efc6e9dc7456e73938424e44f6b4fad600)
112941fdcSEtienne Carriere /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
212941fdcSEtienne Carriere /*
312941fdcSEtienne Carriere  * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
412941fdcSEtienne Carriere  * Author: Torgue Alexandre <alexandre.torgue@st.com> for STMicroelectronics.
512941fdcSEtienne Carriere  */
612941fdcSEtienne Carriere 
712941fdcSEtienne Carriere #ifndef _DT_BINDINGS_STM32_PINFUNC_H
812941fdcSEtienne Carriere #define _DT_BINDINGS_STM32_PINFUNC_H
912941fdcSEtienne Carriere 
1012941fdcSEtienne Carriere /*  define PIN modes */
1112941fdcSEtienne Carriere #define GPIO	0x0
1212941fdcSEtienne Carriere #define AF0	0x1
1312941fdcSEtienne Carriere #define AF1	0x2
1412941fdcSEtienne Carriere #define AF2	0x3
1512941fdcSEtienne Carriere #define AF3	0x4
1612941fdcSEtienne Carriere #define AF4	0x5
1712941fdcSEtienne Carriere #define AF5	0x6
1812941fdcSEtienne Carriere #define AF6	0x7
1912941fdcSEtienne Carriere #define AF7	0x8
2012941fdcSEtienne Carriere #define AF8	0x9
2112941fdcSEtienne Carriere #define AF9	0xa
2212941fdcSEtienne Carriere #define AF10	0xb
2312941fdcSEtienne Carriere #define AF11	0xc
2412941fdcSEtienne Carriere #define AF12	0xd
2512941fdcSEtienne Carriere #define AF13	0xe
2612941fdcSEtienne Carriere #define AF14	0xf
2712941fdcSEtienne Carriere #define AF15	0x10
2812941fdcSEtienne Carriere #define ANALOG	0x11
29a4b9f9b4SEtienne Carriere #define RSVD	0x12
3012941fdcSEtienne Carriere 
3112941fdcSEtienne Carriere /* define Pins number*/
3212941fdcSEtienne Carriere #define PIN_NO(port, line)	(((port) - 'A') * 0x10 + (line))
3312941fdcSEtienne Carriere 
3412941fdcSEtienne Carriere #define STM32_PINMUX(port, line, mode) (((PIN_NO(port, line)) << 8) | (mode))
3512941fdcSEtienne Carriere 
36*0ef3a5efSEtienne Carriere #define STM32_PIN_NSEC		(1 << 31)
37*0ef3a5efSEtienne Carriere 
38*0ef3a5efSEtienne Carriere #define STM32_PINMUX_NSEC(port, line, mode) \
39*0ef3a5efSEtienne Carriere 	(STM32_PIN_NSEC | STM32_PINMUX((port), (line), (mode)))
40*0ef3a5efSEtienne Carriere 
41a4b9f9b4SEtienne Carriere /*  package information */
42a4b9f9b4SEtienne Carriere #define STM32MP_PKG_AA	0x1
43a4b9f9b4SEtienne Carriere #define STM32MP_PKG_AB	0x2
44a4b9f9b4SEtienne Carriere #define STM32MP_PKG_AC	0x4
45a4b9f9b4SEtienne Carriere #define STM32MP_PKG_AD	0x8
46a4b9f9b4SEtienne Carriere 
4712941fdcSEtienne Carriere #endif /* _DT_BINDINGS_STM32_PINFUNC_H */
4812941fdcSEtienne Carriere 
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