18d8a4fa0SJorge Ramirez-Ortiz /* SPDX-License-Identifier: BSD-2-Clause */ 28d8a4fa0SJorge Ramirez-Ortiz /* 38d8a4fa0SJorge Ramirez-Ortiz * Copyright (C) Foundries Ltd. 2021 48d8a4fa0SJorge Ramirez-Ortiz * Author: Jorge Ramirez <jorge@foundries.io> 58d8a4fa0SJorge Ramirez-Ortiz */ 68d8a4fa0SJorge Ramirez-Ortiz 78d8a4fa0SJorge Ramirez-Ortiz #ifndef __DRIVERS_ZYNQMP_CSU_H_ 88d8a4fa0SJorge Ramirez-Ortiz #define __DRIVERS_ZYNQMP_CSU_H_ 98d8a4fa0SJorge Ramirez-Ortiz 108d8a4fa0SJorge Ramirez-Ortiz /* CSU registers */ 118d8a4fa0SJorge Ramirez-Ortiz #define ZYNQMP_CSU_STATUS_OFFSET 0x00 128d8a4fa0SJorge Ramirez-Ortiz #define ZYNQMP_CSU_CTRL_OFFSET 0x04 138d8a4fa0SJorge Ramirez-Ortiz #define ZYNQMP_CSU_SSS_CFG_OFFSET 0x08 148d8a4fa0SJorge Ramirez-Ortiz #define ZYNQMP_CSU_DMA_RESET_OFFSET 0x0c 158d8a4fa0SJorge Ramirez-Ortiz #define ZYNQMP_CSU_MULTI_BOOT_OFFSET 0x10 168d8a4fa0SJorge Ramirez-Ortiz #define ZYNQMP_CSU_TAMPER_TRIG_OFFSET 0x14 178d8a4fa0SJorge Ramirez-Ortiz #define ZYNQMP_CSU_FT_STATUS_OFFSET 0x18 188d8a4fa0SJorge Ramirez-Ortiz #define ZYNQMP_CSU_ISR_OFFSET 0x20 198d8a4fa0SJorge Ramirez-Ortiz 20*1d23b02eSJorge Ramirez-Ortiz #define ZYNQMP_CSU_STATUS_AUTH BIT(0) 218d8a4fa0SJorge Ramirez-Ortiz #define ZYNQMP_CSU_SSS_DMA0_STREAM_TO_AES 0x5A0 228d8a4fa0SJorge Ramirez-Ortiz #define ZYNQMP_CSU_DMA_RESET_SET 1 238d8a4fa0SJorge Ramirez-Ortiz #define ZYNQMP_CSU_DMA_RESET_CLR 0 248d8a4fa0SJorge Ramirez-Ortiz #define ZYNQMP_CSU_ISR_PUF_ACC_ERROR_MASK BIT(12) 258d8a4fa0SJorge Ramirez-Ortiz 268d8a4fa0SJorge Ramirez-Ortiz /* AES-GCM */ 278d8a4fa0SJorge Ramirez-Ortiz #define ZYNQMP_CSU_AES_BASE (CSU_BASE + 0x1000) 288d8a4fa0SJorge Ramirez-Ortiz #define ZYNQMP_CSU_AES_SIZE 0x1000 298d8a4fa0SJorge Ramirez-Ortiz 308d8a4fa0SJorge Ramirez-Ortiz /* SHA */ 318d8a4fa0SJorge Ramirez-Ortiz #define ZYNQMP_CSU_SHA_BASE (CSU_BASE + 0x2000) 328d8a4fa0SJorge Ramirez-Ortiz #define ZYNQMP_CSU_SHA_SIZE 0x1000 338d8a4fa0SJorge Ramirez-Ortiz 348d8a4fa0SJorge Ramirez-Ortiz /* PCAP */ 358d8a4fa0SJorge Ramirez-Ortiz #define ZYNQMP_CSU_PCAP_BASE (CSU_BASE + 0x3000) 368d8a4fa0SJorge Ramirez-Ortiz #define ZYNQMP_CSU_PCAP_SIZE 0x1000 378d8a4fa0SJorge Ramirez-Ortiz 388d8a4fa0SJorge Ramirez-Ortiz /* PUF */ 398d8a4fa0SJorge Ramirez-Ortiz #define ZYNQMP_CSU_PUF_BASE (CSU_BASE + 0x4000) 408d8a4fa0SJorge Ramirez-Ortiz #define ZYNQMP_CSU_PUF_SIZE 0x1000 418d8a4fa0SJorge Ramirez-Ortiz 428d8a4fa0SJorge Ramirez-Ortiz /* TAMPER */ 438d8a4fa0SJorge Ramirez-Ortiz #define ZYNQMP_CSU_TAMPER_BASE (CSU_BASE + 0x5000) 448d8a4fa0SJorge Ramirez-Ortiz #define ZYNQMP_CSU_TAMPER_SIZE 0x38 458d8a4fa0SJorge Ramirez-Ortiz 468d8a4fa0SJorge Ramirez-Ortiz #endif 47