1*1bb92983SJerome Forissier /* SPDX-License-Identifier: (BSD-2-Clause AND BSD-3-Clause) */ 25d1638f3SJens Wiklander /* 35d1638f3SJens Wiklander * Copyright (c) 2015, Linaro Limited 45d1638f3SJens Wiklander * All rights reserved. 55d1638f3SJens Wiklander * 65d1638f3SJens Wiklander * Redistribution and use in source and binary forms, with or without 75d1638f3SJens Wiklander * modification, are permitted provided that the following conditions are met: 85d1638f3SJens Wiklander * 95d1638f3SJens Wiklander * 1. Redistributions of source code must retain the above copyright notice, 105d1638f3SJens Wiklander * this list of conditions and the following disclaimer. 115d1638f3SJens Wiklander * 125d1638f3SJens Wiklander * 2. Redistributions in binary form must reproduce the above copyright notice, 135d1638f3SJens Wiklander * this list of conditions and the following disclaimer in the documentation 145d1638f3SJens Wiklander * and/or other materials provided with the distribution. 155d1638f3SJens Wiklander * 165d1638f3SJens Wiklander * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 175d1638f3SJens Wiklander * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 185d1638f3SJens Wiklander * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 195d1638f3SJens Wiklander * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 205d1638f3SJens Wiklander * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 215d1638f3SJens Wiklander * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 225d1638f3SJens Wiklander * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 235d1638f3SJens Wiklander * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 245d1638f3SJens Wiklander * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 255d1638f3SJens Wiklander * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 265d1638f3SJens Wiklander * POSSIBILITY OF SUCH DAMAGE. 275d1638f3SJens Wiklander */ 285d1638f3SJens Wiklander /* 295d1638f3SJens Wiklander * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. 305d1638f3SJens Wiklander * 315d1638f3SJens Wiklander * Redistribution and use in source and binary forms, with or without 325d1638f3SJens Wiklander * modification, are permitted provided that the following conditions are met: 335d1638f3SJens Wiklander * 345d1638f3SJens Wiklander * Redistributions of source code must retain the above copyright notice, this 355d1638f3SJens Wiklander * list of conditions and the following disclaimer. 365d1638f3SJens Wiklander * 375d1638f3SJens Wiklander * Redistributions in binary form must reproduce the above copyright notice, 385d1638f3SJens Wiklander * this list of conditions and the following disclaimer in the documentation 395d1638f3SJens Wiklander * and/or other materials provided with the distribution. 405d1638f3SJens Wiklander * 415d1638f3SJens Wiklander * Neither the name of ARM nor the names of its contributors may be used 425d1638f3SJens Wiklander * to endorse or promote products derived from this software without specific 435d1638f3SJens Wiklander * prior written permission. 445d1638f3SJens Wiklander * 455d1638f3SJens Wiklander * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 465d1638f3SJens Wiklander * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 475d1638f3SJens Wiklander * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 485d1638f3SJens Wiklander * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 495d1638f3SJens Wiklander * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 505d1638f3SJens Wiklander * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 515d1638f3SJens Wiklander * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 525d1638f3SJens Wiklander * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 535d1638f3SJens Wiklander * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 545d1638f3SJens Wiklander * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 555d1638f3SJens Wiklander * POSSIBILITY OF SUCH DAMAGE. 565d1638f3SJens Wiklander */ 575d1638f3SJens Wiklander 585d1638f3SJens Wiklander #ifndef __DRIVERS_TZC400_H 595d1638f3SJens Wiklander #define __DRIVERS_TZC400_H 605d1638f3SJens Wiklander 615d1638f3SJens Wiklander #include <stdint.h> 625d1638f3SJens Wiklander #include <types_ext.h> 635d1638f3SJens Wiklander #include <trace_levels.h> 645d1638f3SJens Wiklander 655d1638f3SJens Wiklander #define TZC400_REG_SIZE 0x1000 665d1638f3SJens Wiklander 675d1638f3SJens Wiklander #define BUILD_CONFIG_OFF 0x000 685d1638f3SJens Wiklander #define ACTION_OFF 0x004 695d1638f3SJens Wiklander #define GATE_KEEPER_OFF 0x008 705d1638f3SJens Wiklander #define SPECULATION_CTRL_OFF 0x00c 715d1638f3SJens Wiklander #define INT_STATUS 0x010 725d1638f3SJens Wiklander #define INT_CLEAR 0x014 735d1638f3SJens Wiklander 745d1638f3SJens Wiklander #define FAIL_ADDRESS_LOW_OFF 0x020 755d1638f3SJens Wiklander #define FAIL_ADDRESS_HIGH_OFF 0x024 765d1638f3SJens Wiklander #define FAIL_CONTROL_OFF 0x028 775d1638f3SJens Wiklander #define FAIL_ID 0x02c 785d1638f3SJens Wiklander 795d1638f3SJens Wiklander #define REGION_BASE_LOW_OFF 0x100 805d1638f3SJens Wiklander #define REGION_BASE_HIGH_OFF 0x104 815d1638f3SJens Wiklander #define REGION_TOP_LOW_OFF 0x108 825d1638f3SJens Wiklander #define REGION_TOP_HIGH_OFF 0x10c 835d1638f3SJens Wiklander #define REGION_ATTRIBUTES_OFF 0x110 845d1638f3SJens Wiklander #define REGION_ID_ACCESS_OFF 0x114 855d1638f3SJens Wiklander #define REGION_NUM_OFF(region) (0x20 * region) 865d1638f3SJens Wiklander 875d1638f3SJens Wiklander /* ID Registers */ 885d1638f3SJens Wiklander #define PID0_OFF 0xfe0 895d1638f3SJens Wiklander #define PID1_OFF 0xfe4 905d1638f3SJens Wiklander #define PID2_OFF 0xfe8 915d1638f3SJens Wiklander #define PID3_OFF 0xfec 925d1638f3SJens Wiklander #define PID4_OFF 0xfd0 935d1638f3SJens Wiklander #define PID5_OFF 0xfd4 945d1638f3SJens Wiklander #define PID6_OFF 0xfd8 955d1638f3SJens Wiklander #define PID7_OFF 0xfdc 965d1638f3SJens Wiklander #define CID0_OFF 0xff0 975d1638f3SJens Wiklander #define CID1_OFF 0xff4 985d1638f3SJens Wiklander #define CID2_OFF 0xff8 995d1638f3SJens Wiklander #define CID3_OFF 0xffc 1005d1638f3SJens Wiklander 1015d1638f3SJens Wiklander #define BUILD_CONFIG_NF_SHIFT 24 1025d1638f3SJens Wiklander #define BUILD_CONFIG_NF_MASK 0x3 1035d1638f3SJens Wiklander #define BUILD_CONFIG_AW_SHIFT 8 1045d1638f3SJens Wiklander #define BUILD_CONFIG_AW_MASK 0x3f 1055d1638f3SJens Wiklander #define BUILD_CONFIG_NR_SHIFT 0 1065d1638f3SJens Wiklander #define BUILD_CONFIG_NR_MASK 0x1f 1075d1638f3SJens Wiklander 1085d1638f3SJens Wiklander /* Not describing the case where regions 1 to 8 overlap */ 1095d1638f3SJens Wiklander #define ACTION_RV_SHIFT 0 1105d1638f3SJens Wiklander #define ACTION_RV_MASK 0x3 1115d1638f3SJens Wiklander #define ACTION_RV_LOWOK 0x0 1125d1638f3SJens Wiklander #define ACTION_RV_LOWERR 0x1 1135d1638f3SJens Wiklander #define ACTION_RV_HIGHOK 0x2 1145d1638f3SJens Wiklander #define ACTION_RV_HIGHERR 0x3 1155d1638f3SJens Wiklander 1165d1638f3SJens Wiklander /* 1175d1638f3SJens Wiklander * Number of gate keepers is implementation defined. But we know the max for 1185d1638f3SJens Wiklander * this device is 4. Get implementation details from BUILD_CONFIG. 1195d1638f3SJens Wiklander */ 1205d1638f3SJens Wiklander #define GATE_KEEPER_OS_SHIFT 16 1215d1638f3SJens Wiklander #define GATE_KEEPER_OS_MASK 0xf 1225d1638f3SJens Wiklander #define GATE_KEEPER_OR_SHIFT 0 1235d1638f3SJens Wiklander #define GATE_KEEPER_OR_MASK 0xf 1245d1638f3SJens Wiklander #define GATE_KEEPER_FILTER_MASK 0x1 1255d1638f3SJens Wiklander 1265d1638f3SJens Wiklander /* Speculation is enabled by default. */ 1275d1638f3SJens Wiklander #define SPECULATION_CTRL_WRITE_DISABLE (1 << 1) 1285d1638f3SJens Wiklander #define SPECULATION_CTRL_READ_DISABLE (1 << 0) 1295d1638f3SJens Wiklander 1305d1638f3SJens Wiklander /* Max number of filters allowed is 4. */ 1315d1638f3SJens Wiklander #define INT_STATUS_OVERLAP_SHIFT 16 1325d1638f3SJens Wiklander #define INT_STATUS_OVERLAP_MASK 0xf 1335d1638f3SJens Wiklander #define INT_STATUS_OVERRUN_SHIFT 8 1345d1638f3SJens Wiklander #define INT_STATUS_OVERRUN_MASK 0xf 1355d1638f3SJens Wiklander #define INT_STATUS_STATUS_SHIFT 0 1365d1638f3SJens Wiklander #define INT_STATUS_STATUS_MASK 0xf 1375d1638f3SJens Wiklander 1385d1638f3SJens Wiklander #define INT_CLEAR_CLEAR_SHIFT 0 1395d1638f3SJens Wiklander #define INT_CLEAR_CLEAR_MASK 0xf 1405d1638f3SJens Wiklander 1415d1638f3SJens Wiklander #define FAIL_CONTROL_DIR_SHIFT (1 << 24) 1425d1638f3SJens Wiklander #define FAIL_CONTROL_DIR_READ 0x0 1435d1638f3SJens Wiklander #define FAIL_CONTROL_DIR_WRITE 0x1 1445d1638f3SJens Wiklander #define FAIL_CONTROL_NS_SHIFT (1 << 21) 1455d1638f3SJens Wiklander #define FAIL_CONTROL_NS_SECURE 0x0 1465d1638f3SJens Wiklander #define FAIL_CONTROL_NS_NONSECURE 0x1 1475d1638f3SJens Wiklander #define FAIL_CONTROL_PRIV_SHIFT (1 << 20) 1485d1638f3SJens Wiklander #define FAIL_CONTROL_PRIV_PRIV 0x0 1495d1638f3SJens Wiklander #define FAIL_CONTROL_PRIV_UNPRIV 0x1 1505d1638f3SJens Wiklander 1515d1638f3SJens Wiklander /* 1525d1638f3SJens Wiklander * FAIL_ID_ID_MASK depends on AID_WIDTH which is platform specific. 1535d1638f3SJens Wiklander * Platform should provide the value on initialisation. 1545d1638f3SJens Wiklander */ 1555d1638f3SJens Wiklander #define FAIL_ID_VNET_SHIFT 24 1565d1638f3SJens Wiklander #define FAIL_ID_VNET_MASK 0xf 1575d1638f3SJens Wiklander #define FAIL_ID_ID_SHIFT 0 1585d1638f3SJens Wiklander 1595d1638f3SJens Wiklander /* Used along with 'enum tzc_region_attributes' below */ 1605d1638f3SJens Wiklander #define REG_ATTR_SEC_SHIFT 30 1615d1638f3SJens Wiklander #define REG_ATTR_F_EN_SHIFT 0 1625d1638f3SJens Wiklander #define REG_ATTR_F_EN_MASK 0xf 1635d1638f3SJens Wiklander #define REG_ATTR_FILTER_BIT(x) ((1 << x) << REG_ATTR_F_EN_SHIFT) 1645d1638f3SJens Wiklander #define REG_ATTR_FILTER_BIT_ALL (REG_ATTR_F_EN_MASK << \ 1655d1638f3SJens Wiklander REG_ATTR_F_EN_SHIFT) 1665d1638f3SJens Wiklander 1675d1638f3SJens Wiklander #define REGION_ID_ACCESS_NSAID_WR_EN_SHIFT 16 1685d1638f3SJens Wiklander #define REGION_ID_ACCESS_NSAID_RD_EN_SHIFT 0 1695d1638f3SJens Wiklander #define REGION_ID_ACCESS_NSAID_ID_MASK 0xf 1705d1638f3SJens Wiklander 1715d1638f3SJens Wiklander 1725d1638f3SJens Wiklander /* Macros for setting Region ID access permissions based on NSAID */ 1735d1638f3SJens Wiklander #define TZC_REGION_ACCESS_RD(id) \ 1745d1638f3SJens Wiklander ((1 << (id & REGION_ID_ACCESS_NSAID_ID_MASK)) << \ 1755d1638f3SJens Wiklander REGION_ID_ACCESS_NSAID_RD_EN_SHIFT) 1765d1638f3SJens Wiklander #define TZC_REGION_ACCESS_WR(id) \ 1775d1638f3SJens Wiklander ((1 << (id & REGION_ID_ACCESS_NSAID_ID_MASK)) << \ 1785d1638f3SJens Wiklander REGION_ID_ACCESS_NSAID_WR_EN_SHIFT) 1795d1638f3SJens Wiklander #define TZC_REGION_ACCESS_RDWR(id) \ 1805d1638f3SJens Wiklander (TZC_REGION_ACCESS_RD(id) | TZC_REGION_ACCESS_WR(id)) 1815d1638f3SJens Wiklander 1825d1638f3SJens Wiklander /* Filters are bit mapped 0 to 3. */ 1835d1638f3SJens Wiklander #define TZC400_COMPONENT_ID 0xb105f00d 1845d1638f3SJens Wiklander 1855d1638f3SJens Wiklander /******************************************************************************* 1865d1638f3SJens Wiklander * Function & variable prototypes 1875d1638f3SJens Wiklander ******************************************************************************/ 1885d1638f3SJens Wiklander 1895d1638f3SJens Wiklander /* 1905d1638f3SJens Wiklander * What type of action is expected when an access violation occurs. 1915d1638f3SJens Wiklander * The memory requested is zeroed. But we can also raise and event to 1925d1638f3SJens Wiklander * let the system know it happened. 1935d1638f3SJens Wiklander * We can raise an interrupt(INT) and/or cause an exception(ERR). 1945d1638f3SJens Wiklander * TZC_ACTION_NONE - No interrupt, no Exception 1955d1638f3SJens Wiklander * TZC_ACTION_ERR - No interrupt, raise exception -> sync external 1965d1638f3SJens Wiklander * data abort 1975d1638f3SJens Wiklander * TZC_ACTION_INT - Raise interrupt, no exception 1985d1638f3SJens Wiklander * TZC_ACTION_ERR_INT - Raise interrupt, raise exception -> sync 1995d1638f3SJens Wiklander * external data abort 2005d1638f3SJens Wiklander */ 2015d1638f3SJens Wiklander enum tzc_action { 2025d1638f3SJens Wiklander TZC_ACTION_NONE = 0, 2035d1638f3SJens Wiklander TZC_ACTION_ERR = 1, 2045d1638f3SJens Wiklander TZC_ACTION_INT = 2, 2055d1638f3SJens Wiklander TZC_ACTION_ERR_INT = (TZC_ACTION_ERR | TZC_ACTION_INT) 2065d1638f3SJens Wiklander }; 2075d1638f3SJens Wiklander 2085d1638f3SJens Wiklander /* 2095d1638f3SJens Wiklander * Controls secure access to a region. If not enabled secure access is not 2105d1638f3SJens Wiklander * allowed to region. 2115d1638f3SJens Wiklander */ 2125d1638f3SJens Wiklander enum tzc_region_attributes { 2135d1638f3SJens Wiklander TZC_REGION_S_NONE = 0, 2145d1638f3SJens Wiklander TZC_REGION_S_RD = 1, 2155d1638f3SJens Wiklander TZC_REGION_S_WR = 2, 2165d1638f3SJens Wiklander TZC_REGION_S_RDWR = (TZC_REGION_S_RD | TZC_REGION_S_WR) 2175d1638f3SJens Wiklander }; 2185d1638f3SJens Wiklander 2195d1638f3SJens Wiklander 2205d1638f3SJens Wiklander void tzc_init(vaddr_t base); 2215d1638f3SJens Wiklander void tzc_configure_region(uint32_t filters, uint8_t region, 2225d1638f3SJens Wiklander vaddr_t region_base, vaddr_t region_top, 2235d1638f3SJens Wiklander enum tzc_region_attributes sec_attr, 2245d1638f3SJens Wiklander uint32_t ns_device_access); 2255d1638f3SJens Wiklander void tzc_enable_filters(void); 2265d1638f3SJens Wiklander void tzc_disable_filters(void); 2275d1638f3SJens Wiklander void tzc_set_action(enum tzc_action action); 2285d1638f3SJens Wiklander 2295d1638f3SJens Wiklander #if TRACE_LEVEL >= TRACE_DEBUG 2305d1638f3SJens Wiklander void tzc_dump_state(void); 2315d1638f3SJens Wiklander #else 2325d1638f3SJens Wiklander static inline void tzc_dump_state(void) 2335d1638f3SJens Wiklander { 2345d1638f3SJens Wiklander } 2355d1638f3SJens Wiklander #endif 2365d1638f3SJens Wiklander 2375d1638f3SJens Wiklander #endif /* __DRIVERS_TZC400_H */ 238