1 /* SPDX-License-Identifier: BSD-2-Clause */ 2 /* 3 * Copyright 2017 NXP 4 * All rights reserved. 5 * 6 * Peng Fan <peng.fan@nxp.com> 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright notice, 12 * this list of conditions and the following disclaimer. 13 * 14 * 2. Redistributions in binary form must reproduce the above copyright notice, 15 * this list of conditions and the following disclaimer in the documentation 16 * and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #ifndef __DRIVERS_TZC380_H 32 #define __DRIVERS_TZC380_H 33 34 #include <stdint.h> 35 #include <trace_levels.h> 36 #include <types_ext.h> 37 #include <util.h> 38 39 #define TZC400_REG_SIZE 0x1000 40 41 #define BUILD_CONFIG_OFF 0x000 42 #define ACTION_OFF 0x004 43 #define LOCKDOWN_RANGE_OFF 0x008 44 #define LOCKDOWN_SELECT_OFF 0x00C 45 #define INT_STATUS 0x010 46 #define INT_CLEAR 0x014 47 48 #define FAIL_ADDRESS_LOW_OFF 0x020 49 #define FAIL_ADDRESS_HIGH_OFF 0x024 50 #define FAIL_CONTROL_OFF 0x028 51 #define FAIL_ID 0x02c 52 53 #define SPECULATION_CTRL_OFF 0x030 54 #define SECURITY_INV_EN_OFF 0x034 55 56 #define REGION_SETUP_LOW_OFF(n) (0x100 + n * 0x10) 57 #define REGION_SETUP_HIGH_OFF(n) (0x104 + n * 0x10) 58 #define REGION_ATTRIBUTES_OFF(n) (0x108 + n * 0x10) 59 60 /* ID Registers */ 61 #define PID0_OFF 0xfe0 62 #define PID1_OFF 0xfe4 63 #define PID2_OFF 0xfe8 64 #define PID3_OFF 0xfec 65 #define PID4_OFF 0xfd0 66 #define CID0_OFF 0xff0 67 #define CID1_OFF 0xff4 68 #define CID2_OFF 0xff8 69 #define CID3_OFF 0xffc 70 71 #define BUILD_CONFIG_AW_SHIFT 8 72 #define BUILD_CONFIG_AW_MASK 0x3f 73 #define BUILD_CONFIG_NR_SHIFT 0 74 #define BUILD_CONFIG_NR_MASK 0xf 75 76 #define ACTION_RV_SHIFT 0 77 #define ACTION_RV_MASK 0x3 78 #define ACTION_RV_LOWOK 0x0 79 #define ACTION_RV_LOWERR 0x1 80 #define ACTION_RV_HIGHOK 0x2 81 #define ACTION_RV_HIGHERR 0x3 82 83 /* Speculation is enabled by default. */ 84 #define SPECULATION_CTRL_WRITE_DISABLE BIT(1) 85 #define SPECULATION_CTRL_READ_DISABLE BIT(0) 86 87 #define INT_STATUS_OVERRUN_SHIFT 1 88 #define INT_STATUS_OVERRUN_MASK 0x1 89 #define INT_STATUS_STATUS_SHIFT 0 90 #define INT_STATUS_STATUS_MASK 0x1 91 92 #define INT_CLEAR_CLEAR_SHIFT 0 93 #define INT_CLEAR_CLEAR_MASK 0x1 94 95 #define TZC380_COMPONENT_ID 0xb105f00d 96 #define TZC380_PERIPH_ID_LOW 0x001bb380 97 #define TZC380_PERIPH_ID_HIGH 0x00000004 98 99 /******************************************************************************* 100 * Function & variable prototypes 101 ******************************************************************************/ 102 103 /* 104 * What type of action is expected when an access violation occurs. 105 * The memory requested is zeroed. But we can also raise and event to 106 * let the system know it happened. 107 * We can raise an interrupt(INT) and/or cause an exception(ERR). 108 * TZC_ACTION_NONE - No interrupt, no Exception 109 * TZC_ACTION_ERR - No interrupt, raise exception -> sync external 110 * data abort 111 * TZC_ACTION_INT - Raise interrupt, no exception 112 * TZC_ACTION_ERR_INT - Raise interrupt, raise exception -> sync 113 * external data abort 114 */ 115 enum tzc_action { 116 TZC_ACTION_NONE = 0, 117 TZC_ACTION_ERR = 1, 118 TZC_ACTION_INT = 2, 119 TZC_ACTION_ERR_INT = (TZC_ACTION_ERR | TZC_ACTION_INT) 120 }; 121 122 123 #define TZC_SP_NS_W BIT(0) 124 #define TZC_SP_NS_R BIT(1) 125 #define TZC_SP_S_W BIT(2) 126 #define TZC_SP_S_R BIT(3) 127 128 #define TZC_ATTR_SP_SHIFT 28 129 #define TZC_ATTR_SP_MASK GENMASK_32(31, 28) 130 #define TZC_ATTR_SP_ALL ((TZC_SP_S_W | TZC_SP_S_R | TZC_SP_NS_W | \ 131 TZC_SP_NS_R) << TZC_ATTR_SP_SHIFT) 132 #define TZC_ATTR_SP_S_RW ((TZC_SP_S_W | TZC_SP_S_R) << \ 133 TZC_ATTR_SP_SHIFT) 134 #define TZC_ATTR_SP_NS_RW ((TZC_SP_NS_W | TZC_SP_NS_R) << \ 135 TZC_ATTR_SP_SHIFT) 136 137 #define TZC_REGION_SIZE_32K 0xe 138 #define TZC_REGION_SIZE_64K 0xf 139 #define TZC_REGION_SIZE_128K 0x10 140 #define TZC_REGION_SIZE_256K 0x11 141 #define TZC_REGION_SIZE_512K 0x12 142 #define TZC_REGION_SIZE_1M 0x13 143 #define TZC_REGION_SIZE_2M 0x14 144 #define TZC_REGION_SIZE_4M 0x15 145 #define TZC_REGION_SIZE_8M 0x16 146 #define TZC_REGION_SIZE_16M 0x17 147 #define TZC_REGION_SIZE_32M 0x18 148 #define TZC_REGION_SIZE_64M 0x19 149 #define TZC_REGION_SIZE_128M 0x1a 150 #define TZC_REGION_SIZE_256M 0x1b 151 #define TZC_REGION_SIZE_512M 0x1c 152 #define TZC_REGION_SIZE_1G 0x1d 153 #define TZC_REGION_SIZE_2G 0x1e 154 #define TZC_REGION_SIZE_4G 0x1f 155 #define TZC_REGION_SIZE_8G 0x20 156 #define TZC_REGION_SIZE_16G 0x21 157 #define TZC_REGION_SIZE_32G 0x22 158 #define TZC_REGION_SIZE_64G 0x23 159 #define TZC_REGION_SIZE_128G 0x24 160 #define TZC_REGION_SIZE_256G 0x25 161 #define TZC_REGION_SIZE_512G 0x26 162 #define TZC_REGION_SIZE_1T 0x27 163 #define TZC_REGION_SIZE_2T 0x28 164 #define TZC_REGION_SIZE_4T 0x29 165 #define TZC_REGION_SIZE_8T 0x2a 166 #define TZC_REGION_SIZE_16T 0x2b 167 #define TZC_REGION_SIZE_32T 0x2c 168 #define TZC_REGION_SIZE_64T 0x2d 169 #define TZC_REGION_SIZE_128T 0x2e 170 #define TZC_REGION_SIZE_256T 0x2f 171 #define TZC_REGION_SIZE_512T 0x30 172 #define TZC_REGION_SIZE_1P 0x31 173 #define TZC_REGION_SIZE_2P 0x32 174 #define TZC_REGION_SIZE_4P 0x33 175 #define TZC_REGION_SIZE_8P 0x34 176 #define TZC_REGION_SIZE_16P 0x35 177 #define TZC_REGION_SIZE_32P 0x36 178 #define TZC_REGION_SIZE_64P 0x37 179 #define TZC_REGION_SIZE_128P 0x38 180 #define TZC_REGION_SIZE_256P 0x39 181 #define TZC_REGION_SIZE_512P 0x3a 182 #define TZC_REGION_SIZE_1E 0x3b 183 #define TZC_REGION_SIZE_2E 0x3c 184 #define TZC_REGION_SIZE_4E 0x3d 185 #define TZC_REGION_SIZE_8E 0x3e 186 #define TZC_REGION_SIZE_16E 0x3f 187 188 #define TZC_REGION_SIZE_SHIFT 0x1 189 #define TZC_REGION_SIZE_MASK GENMASK_32(6, 1) 190 #define TZC_ATTR_REGION_SIZE(s) ((s) << TZC_REGION_SIZE_SHIFT) 191 192 #define TZC_ATTR_REGION_EN_SHIFT 0x0 193 #define TZC_ATTR_REGION_EN_MASK 0x1 194 195 #define TZC_ATTR_REGION_EN 196 #define TZC_ATTR_REGION_ENABLE 0x1 197 #define TZC_ATTR_REGION_DISABLE 0x0 198 199 void tzc_init(vaddr_t base); 200 void tzc_configure_region(uint8_t region, vaddr_t region_base, uint32_t attr); 201 void tzc_region_enable(uint8_t region); 202 void tzc_security_inversion_en(vaddr_t base); 203 void tzc_set_action(enum tzc_action action); 204 void tzc_fail_dump(void); 205 void tzc_int_clear(void); 206 207 #if TRACE_LEVEL >= TRACE_DEBUG 208 void tzc_dump_state(void); 209 #else 210 static inline void tzc_dump_state(void) 211 { 212 } 213 #endif 214 215 #endif /* __DRIVERS_TZC400_H */ 216