xref: /optee_os/core/include/drivers/stm32_risab.h (revision c413678c6ca61ffe33886f003b0403fb5f81b9c5)
1*c413678cSGatien Chevallier /* SPDX-License-Identifier: BSD-2-Clause */
2*c413678cSGatien Chevallier /*
3*c413678cSGatien Chevallier  * Copyright (c) 2022-2024, STMicroelectronics
4*c413678cSGatien Chevallier  */
5*c413678cSGatien Chevallier 
6*c413678cSGatien Chevallier #ifndef __DRIVERS_STM32_RISAB_H__
7*c413678cSGatien Chevallier #define __DRIVERS_STM32_RISAB_H__
8*c413678cSGatien Chevallier 
9*c413678cSGatien Chevallier /*
10*c413678cSGatien Chevallier  * stm32_risab_clear_illegal_access_flags() - Clears flags raised when an
11*c413678cSGatien Chevallier  * illegal access occurs on a memory region
12*c413678cSGatien Chevallier  */
13*c413678cSGatien Chevallier #if defined(CFG_STM32_RISAB)
14*c413678cSGatien Chevallier void stm32_risab_clear_illegal_access_flags(void);
15*c413678cSGatien Chevallier #else /* defined(CFG_STM32_RISAB) */
stm32_risab_clear_illegal_access_flags(void)16*c413678cSGatien Chevallier static inline void stm32_risab_clear_illegal_access_flags(void)
17*c413678cSGatien Chevallier {
18*c413678cSGatien Chevallier }
19*c413678cSGatien Chevallier #endif /* defined(CFG_STM32_RISAB) */
20*c413678cSGatien Chevallier 
21*c413678cSGatien Chevallier /*
22*c413678cSGatien Chevallier  * stm32_risab_print_erroneous_data() - Prints the data associated to an illegal
23*c413678cSGatien Chevallier  * access occurring on a memory protected by a RISAB : faulty address and
24*c413678cSGatien Chevallier  * firewall attributes of the master causing the illegal access.
25*c413678cSGatien Chevallier  */
26*c413678cSGatien Chevallier #if defined(CFG_STM32_RISAB) && defined(CFG_TEE_CORE_DEBUG)
27*c413678cSGatien Chevallier void stm32_risab_print_erroneous_data(void);
28*c413678cSGatien Chevallier #else /* defined(CFG_STM32_RISAB) && defined(CFG_TEE_CORE_DEBUG) */
stm32_risab_print_erroneous_data(void)29*c413678cSGatien Chevallier static inline void stm32_risab_print_erroneous_data(void)
30*c413678cSGatien Chevallier {
31*c413678cSGatien Chevallier }
32*c413678cSGatien Chevallier #endif /* defined(CFG_STM32_RISAB) && defined(CFG_TEE_CORE_DEBUG) */
33*c413678cSGatien Chevallier 
34*c413678cSGatien Chevallier #endif /*__DRIVERS_STM32_RISAB_H__*/
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