1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* 3 * Copyright (c) 2017-2019, STMicroelectronics 4 * 5 * STM32 GPIO driver relies on platform util fiunctions to get base address 6 * and clock ID of the GPIO banks. The drvier API allows to retrieve pin muxing 7 * configuration for given nodes and load them at runtime. A pin control 8 * instance provide an active and a standby configuration. Pin onwer is 9 * responsible to load to expected configuration during PM state transitions 10 * as STM32 GPIO driver does no register callbacks to the PM framework. 11 */ 12 13 #ifndef __STM32_GPIO_H 14 #define __STM32_GPIO_H 15 16 #include <assert.h> 17 #include <stdbool.h> 18 #include <stdint.h> 19 #include <stddef.h> 20 21 #define GPIO_MODE_INPUT 0x0 22 #define GPIO_MODE_OUTPUT 0x1 23 #define GPIO_MODE_ALTERNATE 0x2 24 #define GPIO_MODE_ANALOG 0x3 25 26 #define GPIO_OTYPE_PUSH_PULL 0x0 27 #define GPIO_OTYPE_OPEN_DRAIN 0x1 28 29 #define GPIO_OSPEED_LOW 0x0 30 #define GPIO_OSPEED_MEDIUM 0x1 31 #define GPIO_OSPEED_HIGH 0x2 32 #define GPIO_OSPEED_VERY_HIGH 0x3 33 34 #define GPIO_PUPD_NO_PULL 0x0 35 #define GPIO_PUPD_PULL_UP 0x1 36 #define GPIO_PUPD_PULL_DOWN 0x2 37 38 #define GPIO_OD_LEVEL_LOW 0x0 39 #define GPIO_OD_LEVEL_HIGH 0x1 40 41 /* 42 * GPIO configuration description structured as single 16bit word 43 * for efficient save/restore when GPIO pin suspends or resumes. 44 * 45 * @mode: One of GPIO_MODE_* 46 * @otype: One of GPIO_OTYPE_* 47 * @ospeed: One of GPIO_OSPEED_* 48 * @pupd: One of GPIO_PUPD_* 49 * @od: One of GPIO_OD_* 50 * @af: Alternate function numerical ID between 0 and 15 51 */ 52 struct gpio_cfg { 53 uint16_t mode: 2; 54 uint16_t otype: 1; 55 uint16_t ospeed: 2; 56 uint16_t pupd: 2; 57 uint16_t od: 1; 58 uint16_t af: 4; 59 }; 60 61 /* 62 * Descrption of a pin and its 2 states muxing 63 * 64 * @bank: GPIO bank identifier as assigned by the platform 65 * @pin: Pin number in the GPIO bank 66 * @active_cfg: Configuration in active state 67 * @standby_cfg: Configuration in standby state 68 */ 69 struct stm32_pinctrl { 70 uint8_t bank; 71 uint8_t pin; 72 struct gpio_cfg active_cfg; 73 struct gpio_cfg standby_cfg; 74 }; 75 76 /* 77 * Apply series of pin muxing configuration, active state and standby state 78 * 79 * @pinctrl: array of pinctrl references 80 * @count: Number of entries in @pinctrl 81 */ 82 void stm32_pinctrl_load_active_cfg(struct stm32_pinctrl *pinctrl, size_t cnt); 83 void stm32_pinctrl_load_standby_cfg(struct stm32_pinctrl *pinctrl, size_t cnt); 84 85 /* 86 * Save the current pin configuration as the standby state for a pin series 87 * 88 * @pinctrl: array of pinctrl references 89 * @count: Number of entries in @pinctrl 90 */ 91 void stm32_pinctrl_store_standby_cfg(struct stm32_pinctrl *pinctrl, size_t cnt); 92 93 /* 94 * Save pinctrl instances defined in DT node: identifiers and power states 95 * 96 * @fdt: device tree 97 * @node: device node in the device tree 98 * @pinctrl: NULL or pointer to array of struct stm32_pinctrl 99 * @count: number of elements pointed by argument cfg 100 * 101 * Return the number of pinctrl instances found or a negative value on error. 102 * 103 * When @count is 0, @pinctrl may be NULL. The function will return only the 104 * number of pinctrl instances found in the device tree for the target 105 * device node. 106 * 107 * If more instances than @count are found then the function returns the 108 * effective number of pincltr instance found in the node but fills 109 * output array @pinctrl only for the input @count first entries. 110 */ 111 int stm32_pinctrl_fdt_get_pinctrl(void *fdt, int node, 112 struct stm32_pinctrl *pinctrl, size_t count); 113 114 /* 115 * Set target output GPIO pin to high or low level 116 * 117 * @bank: GPIO bank identifier as assigned by the platform 118 * @pin: GPIO pin position in the GPIO bank 119 * @high: 1 to set GPIO to high level, 0 to set to GPIO low level 120 */ 121 void stm32_gpio_set_output_level(unsigned int bank, unsigned int pin, int high); 122 123 /* 124 * Set output GPIO pin referenced by @pinctrl to high or low level 125 * 126 * @pinctrl: Reference to pinctrl 127 * @high: 1 to set GPIO to high level, 0 to set to GPIO low level 128 */ 129 static inline void stm32_pinctrl_set_gpio_level(struct stm32_pinctrl *pinctrl, 130 int high) 131 { 132 stm32_gpio_set_output_level(pinctrl->bank, pinctrl->pin, high); 133 } 134 135 /* 136 * Get input GPIO pin current level, high or low 137 * 138 * @bank: GPIO bank identifier as assigned by the platform 139 * @pin: GPIO pin position in the GPIO bank 140 * Return 1 if GPIO level is high, 0 if it is low 141 */ 142 int stm32_gpio_get_input_level(unsigned int bank, unsigned int pin); 143 144 /* 145 * Set target output GPIO pin to high or low level 146 * 147 * @pinctrl: Reference to pinctrl 148 * Return 1 if GPIO level is high, 0 if it is low 149 */ 150 static inline int stm32_pinctrl_get_gpio_level(struct stm32_pinctrl *pinctrl) 151 { 152 return stm32_gpio_get_input_level(pinctrl->bank, pinctrl->pin); 153 } 154 155 #ifdef CFG_STM32_GPIO 156 /* 157 * Configure pin muxing access permission: can be secure or not 158 * 159 * @bank: GPIO bank identifier as assigned by the platform 160 * @pin: Pin number in the GPIO bank 161 * @secure: True if pin is secure, false otherwise 162 */ 163 void stm32_gpio_set_secure_cfg(unsigned int bank, unsigned int pin, 164 bool secure); 165 #else 166 static inline void stm32_gpio_set_secure_cfg(unsigned int bank __unused, 167 unsigned int pin __unused, 168 bool secure __unused) 169 { 170 assert(0); 171 } 172 #endif 173 174 /* 175 * Get the number of GPIO pins supported by a target GPIO bank 176 * 177 * @fdt: device tree reference 178 * @pinctrl_node: pinctrl node which GPIO bank node belongs to 179 * @bank: target GPIO bank ID 180 * Return number of GPIO pins (>= 0) or a negative value on error 181 */ 182 int stm32_get_gpio_count(void *fdt, int pinctrl_node, unsigned int bank); 183 184 #endif /*__STM32_GPIO_H*/ 185