1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* 3 * Copyright (c) 2017-2019, STMicroelectronics 4 * 5 * STM32 GPIO driver relies on platform util fiunctions to get base address 6 * and clock ID of the GPIO banks. The drvier API allows to retrieve pin muxing 7 * configuration for given nodes and load them at runtime. A pin control 8 * instance provide an active and a standby configuration. Pin onwer is 9 * responsible to load to expected configuration during PM state transitions 10 * as STM32 GPIO driver does no register callbacks to the PM framework. 11 */ 12 13 #ifndef __STM32_GPIO_H 14 #define __STM32_GPIO_H 15 16 #include <stdbool.h> 17 #include <stdint.h> 18 #include <stddef.h> 19 20 #define GPIO_MODE_INPUT 0x0 21 #define GPIO_MODE_OUTPUT 0x1 22 #define GPIO_MODE_ALTERNATE 0x2 23 #define GPIO_MODE_ANALOG 0x3 24 25 #define GPIO_OTYPE_PUSH_PULL 0x0 26 #define GPIO_OTYPE_OPEN_DRAIN 0x1 27 28 #define GPIO_OSPEED_LOW 0x0 29 #define GPIO_OSPEED_MEDIUM 0x1 30 #define GPIO_OSPEED_HIGH 0x2 31 #define GPIO_OSPEED_VERY_HIGH 0x3 32 33 #define GPIO_PUPD_NO_PULL 0x0 34 #define GPIO_PUPD_PULL_UP 0x1 35 #define GPIO_PUPD_PULL_DOWN 0x2 36 37 #define GPIO_OD_LEVEL_LOW 0x0 38 #define GPIO_OD_LEVEL_HIGH 0x1 39 40 /* 41 * GPIO configuration description structured as single 16bit word 42 * for efficient save/restore when GPIO pin suspends or resumes. 43 * 44 * @mode: One of GPIO_MODE_* 45 * @otype: One of GPIO_OTYPE_* 46 * @ospeed: One of GPIO_OSPEED_* 47 * @pupd: One of GPIO_PUPD_* 48 * @od: One of GPIO_OD_* 49 * @af: Alternate function numerical ID between 0 and 15 50 */ 51 struct gpio_cfg { 52 uint16_t mode: 2; 53 uint16_t otype: 1; 54 uint16_t ospeed: 2; 55 uint16_t pupd: 2; 56 uint16_t od: 1; 57 uint16_t af: 4; 58 }; 59 60 /* 61 * Descrption of a pin and its 2 states muxing 62 * 63 * @bank: GPIO bank identifier as assigned by the platform 64 * @pin: Pin number in the GPIO bank 65 * @active_cfg: Configuratioh in active state 66 * @standby_cfg: Configuratioh in standby state 67 */ 68 struct stm32_pinctrl { 69 uint8_t bank; 70 uint8_t pin; 71 struct gpio_cfg active_cfg; 72 struct gpio_cfg standby_cfg; 73 }; 74 75 /* 76 * Apply series of pin muxing configuration, active state and standby state 77 * 78 * @pinctrl: array of pinctrl references 79 * @count: Number of entries in @pinctrl 80 */ 81 void stm32_pinctrl_load_active_cfg(struct stm32_pinctrl *pinctrl, size_t cnt); 82 void stm32_pinctrl_load_standby_cfg(struct stm32_pinctrl *pinctrl, size_t cnt); 83 84 /* 85 * Save the current pin configuration as the standby state for a pin series 86 * 87 * @pinctrl: array of pinctrl references 88 * @count: Number of entries in @pinctrl 89 */ 90 void stm32_pinctrl_store_standby_cfg(struct stm32_pinctrl *pinctrl, size_t cnt); 91 92 /* 93 * Save pinctrl instances defined in DT node: identifiers and power states 94 * 95 * @fdt: device tree 96 * @node: device node in the device tree 97 * @pinctrl: NULL or pointer to array of struct stm32_pinctrl 98 * @count: number of elements pointed by argument cfg 99 * 100 * Return the number of pinctrl instances found or a negative value on error. 101 * 102 * When @count is 0, @pinctrl may be NULL. The function will return only the 103 * number of pinctrl instances found in the device tree for the target 104 * device node. 105 * 106 * If more instances than @count are found then the function returns the 107 * effective number of pincltr instance found in the node but fills 108 * output array @pinctrl only for the input @count first entries. 109 */ 110 int stm32_pinctrl_fdt_get_pinctrl(void *fdt, int node, 111 struct stm32_pinctrl *pinctrl, size_t count); 112 113 /* 114 * Set target output GPIO pin to high or low level 115 * 116 * @bank: GPIO bank identifier as assigned by the platform 117 * @pin: GPIO pin position in the GPIO bank 118 * @high: 1 to set GPIO to high level, 0 to set to GPIO low level 119 */ 120 void stm32_gpio_set_output_level(unsigned int bank, unsigned int pin, int high); 121 122 /* 123 * Set output GPIO pin referenced by @pinctrl to high or low level 124 * 125 * @pinctrl: Reference to pinctrl 126 * @high: 1 to set GPIO to high level, 0 to set to GPIO low level 127 */ 128 static inline void stm32_pinctrl_set_gpio_level(struct stm32_pinctrl *pinctrl, 129 int high) 130 { 131 stm32_gpio_set_output_level(pinctrl->bank, pinctrl->pin, high); 132 } 133 134 /* 135 * Get input GPIO pin current level, high or low 136 * 137 * @bank: GPIO bank identifier as assigned by the platform 138 * @pin: GPIO pin position in the GPIO bank 139 * Return 1 if GPIO level is high, 0 if it is low 140 */ 141 int stm32_gpio_get_input_level(unsigned int bank, unsigned int pin); 142 143 /* 144 * Set target output GPIO pin to high or low level 145 * 146 * @pinctrl: Reference to pinctrl 147 * Return 1 if GPIO level is high, 0 if it is low 148 */ 149 static inline int stm32_pinctrl_get_gpio_level(struct stm32_pinctrl *pinctrl) 150 { 151 return stm32_gpio_get_input_level(pinctrl->bank, pinctrl->pin); 152 } 153 154 /* 155 * Configure pin muxing access permission: can be secure or not 156 * 157 * @bank: GPIO bank identifier as assigned by the platform 158 * @pin: Pin number in the GPIO bank 159 * @secure: True if pin is secure, false otherwise 160 */ 161 void stm32_gpio_set_secure_cfg(unsigned int bank, unsigned int pin, 162 bool secure); 163 164 /* 165 * Get the number of GPIO pins supported by a target GPIO bank 166 * 167 * @fdt: device tree reference 168 * @pinctrl_node: pinctrl node which GPIO bank node belongs to 169 * @bank: target GPIO bank ID 170 * Return number of GPIO pins (>= 0) or a negative value on error 171 */ 172 int stm32_get_gpio_count(void *fdt, int pinctrl_node, unsigned int bank); 173 174 #endif /*__STM32_GPIO_H*/ 175