xref: /optee_os/core/include/drivers/pl061_gpio.h (revision a50cb361d9e5735f197ccc87beb0d24af8315369)
1 /*
2  * Copyright (c) 2016, Linaro Limited
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are met:
7  *
8  * 1. Redistributions of source code must retain the above copyright notice,
9  * this list of conditions and the following disclaimer.
10  *
11  * 2. Redistributions in binary form must reproduce the above copyright notice,
12  * this list of conditions and the following disclaimer in the documentation
13  * and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
19  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25  * POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 #ifndef __PL061_GPIO_H__
29 #define __PL061_GPIO_H__
30 
31 #include <gpio.h>
32 #include <types_ext.h>
33 
34 #define PL061_REG_SIZE	0x1000
35 
36 enum pl061_mode_control {
37 	PL061_MC_SW,
38 	PL061_MC_HW
39 };
40 
41 struct pl061_data {
42 	struct gpio_chip chip;
43 };
44 
45 void pl061_register(vaddr_t base_addr, unsigned int gpio_dev);
46 void pl061_init(struct pl061_data *pd);
47 enum pl061_mode_control pl061_get_mode_control(unsigned int gpio_pin);
48 void pl061_set_mode_control(unsigned int gpio_pin,
49 	enum pl061_mode_control hw_sw);
50 
51 #endif	/* __PL061_GPIO_H__ */
52