11bb92983SJerome Forissier /* SPDX-License-Identifier: BSD-2-Clause */ 2aca1545dSVictor Chong /* 3aca1545dSVictor Chong * Copyright (c) 2016, Linaro Limited 4aca1545dSVictor Chong * 5aca1545dSVictor Chong */ 6aca1545dSVictor Chong 7*fbe66cf8SEtienne Carriere #ifndef __DRIVERS_PL022_SPI_H 8*fbe66cf8SEtienne Carriere #define __DRIVERS_PL022_SPI_H 9aca1545dSVictor Chong 106dcd18c8SClément Léger #include <drivers/gpio.h> 11aca1545dSVictor Chong #include <spi.h> 12aca1545dSVictor Chong 13aca1545dSVictor Chong #define PL022_REG_SIZE 0x1000 14aca1545dSVictor Chong 1526128b8fSVictor Chong enum pl022_cs_control { 1626128b8fSVictor Chong PL022_CS_CTRL_AUTO_GPIO, 1726128b8fSVictor Chong PL022_CS_CTRL_CB, 1826128b8fSVictor Chong PL022_CS_CTRL_MANUAL 1926128b8fSVictor Chong }; 2026128b8fSVictor Chong 2126128b8fSVictor Chong struct pl022_cs_gpio_data { 2226128b8fSVictor Chong struct gpio_chip *chip; 2326128b8fSVictor Chong unsigned int pin_num; 2426128b8fSVictor Chong }; 2526128b8fSVictor Chong 2626128b8fSVictor Chong union pl022_cs_data { 2726128b8fSVictor Chong struct pl022_cs_gpio_data gpio_data; 2826128b8fSVictor Chong void (*cs_cb)(enum gpio_level value); 2926128b8fSVictor Chong }; 3026128b8fSVictor Chong 31aca1545dSVictor Chong struct pl022_data { 3226128b8fSVictor Chong union pl022_cs_data cs_data; 33aca1545dSVictor Chong struct spi_chip chip; 34aca1545dSVictor Chong vaddr_t base; 3526128b8fSVictor Chong enum spi_mode mode; 3626128b8fSVictor Chong enum pl022_cs_control cs_control; 37aca1545dSVictor Chong unsigned int clk_hz; 38aca1545dSVictor Chong unsigned int speed_hz; 39aca1545dSVictor Chong unsigned int data_size_bits; 40aca1545dSVictor Chong bool loopback; 41aca1545dSVictor Chong }; 42aca1545dSVictor Chong 436356eeb2SVictor Chong void pl022_init(struct pl022_data *pd); 44aca1545dSVictor Chong 45*fbe66cf8SEtienne Carriere #endif /* __DRIVERS_PL022_SPI_H */ 46aca1545dSVictor Chong 47