11bb92983SJerome Forissier /* SPDX-License-Identifier: BSD-2-Clause */ 285278139SSumit Garg /* 385278139SSumit Garg * Copyright (C) 2015 Freescale Semiconductor, Inc. 4*1eacd17cSSumit Garg * Copyright (c) 2020, Linaro Limited 585278139SSumit Garg * All rights reserved. 685278139SSumit Garg * 785278139SSumit Garg * Redistribution and use in source and binary forms, with or without 885278139SSumit Garg * modification, are permitted provided that the following conditions are met: 985278139SSumit Garg * 1085278139SSumit Garg * 1. Redistributions of source code must retain the above copyright notice, 1185278139SSumit Garg * this list of conditions and the following disclaimer. 1285278139SSumit Garg * 1385278139SSumit Garg * 2. Redistributions in binary form must reproduce the above copyright notice, 1485278139SSumit Garg * this list of conditions and the following disclaimer in the documentation 1585278139SSumit Garg * and/or other materials provided with the distribution. 1685278139SSumit Garg * 1785278139SSumit Garg * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 1885278139SSumit Garg * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1985278139SSumit Garg * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2085278139SSumit Garg * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 2185278139SSumit Garg * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 2285278139SSumit Garg * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 2385278139SSumit Garg * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 2485278139SSumit Garg * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 2585278139SSumit Garg * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 2685278139SSumit Garg * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 2785278139SSumit Garg * POSSIBILITY OF SUCH DAMAGE. 2885278139SSumit Garg */ 2985278139SSumit Garg #ifndef NS16550_H 3085278139SSumit Garg #define NS16550_H 3185278139SSumit Garg 322e5aa31bSJerome Forissier #include <drivers/serial.h> 33*1eacd17cSSumit Garg #include <io.h> 34*1eacd17cSSumit Garg #include <types_ext.h> 35*1eacd17cSSumit Garg 36*1eacd17cSSumit Garg #define IO_WIDTH_U8 0 37*1eacd17cSSumit Garg #define IO_WIDTH_U32 1 3885278139SSumit Garg 392e5aa31bSJerome Forissier struct ns16550_data { 402e5aa31bSJerome Forissier struct io_pa_va base; 412e5aa31bSJerome Forissier struct serial_chip chip; 42*1eacd17cSSumit Garg uint8_t io_width; 43*1eacd17cSSumit Garg uint8_t reg_shift; 442e5aa31bSJerome Forissier }; 4585278139SSumit Garg 46*1eacd17cSSumit Garg static inline unsigned int serial_in(vaddr_t addr, uint8_t io_width) 47*1eacd17cSSumit Garg { 48*1eacd17cSSumit Garg if (io_width == IO_WIDTH_U32) 49*1eacd17cSSumit Garg return io_read32(addr); 50*1eacd17cSSumit Garg else 51*1eacd17cSSumit Garg return io_read8(addr); 52*1eacd17cSSumit Garg } 53*1eacd17cSSumit Garg 54*1eacd17cSSumit Garg static inline void serial_out(vaddr_t addr, uint8_t io_width, int ch) 55*1eacd17cSSumit Garg { 56*1eacd17cSSumit Garg if (io_width == IO_WIDTH_U32) 57*1eacd17cSSumit Garg io_write32(addr, ch); 58*1eacd17cSSumit Garg else 59*1eacd17cSSumit Garg io_write8(addr, ch); 60*1eacd17cSSumit Garg } 61*1eacd17cSSumit Garg 62*1eacd17cSSumit Garg void ns16550_init(struct ns16550_data *pd, paddr_t base, uint8_t io_width, 63*1eacd17cSSumit Garg uint8_t reg_shift); 6485278139SSumit Garg 6585278139SSumit Garg #endif /* NS16550_H */ 66