xref: /optee_os/core/include/drivers/ls_gpio.h (revision 6dcd18c8f698ea84946f08d17db7ae19742c1e83)
116c13b4dSManish Tomar /* SPDX-License-Identifier: BSD-2-Clause */
216c13b4dSManish Tomar /*
316c13b4dSManish Tomar  * Copyright 2021 NXP
416c13b4dSManish Tomar  *
516c13b4dSManish Tomar  * Helper Code for GPIO controller driver
616c13b4dSManish Tomar  *
716c13b4dSManish Tomar  */
816c13b4dSManish Tomar 
916c13b4dSManish Tomar #ifndef __DRIVERS_LS_GPIO_H
1016c13b4dSManish Tomar #define __DRIVERS_LS_GPIO_H
1116c13b4dSManish Tomar 
12*6dcd18c8SClément Léger #include <drivers/gpio.h>
1316c13b4dSManish Tomar #include <stdlib.h>
1416c13b4dSManish Tomar #include <tee_api_types.h>
15b4bfc9a9SJens Wiklander #include <util.h>
1616c13b4dSManish Tomar 
1716c13b4dSManish Tomar /* supported ports for GPIO controller */
18b4bfc9a9SJens Wiklander #define MAX_GPIO_PINS U(31)
1916c13b4dSManish Tomar 
2016c13b4dSManish Tomar /* map register values to LE by subtracting pin number from MAX GPIO PINS */
212735636fSJens Wiklander #define PIN_SHIFT(x) BIT(MAX_GPIO_PINS - (x))
2216c13b4dSManish Tomar 
2316c13b4dSManish Tomar /* gpio register offsets */
24b4bfc9a9SJens Wiklander #define GPIODIR U(0x0)  /* direction register */
25b4bfc9a9SJens Wiklander #define GPIOODR U(0x4)  /* open drain register */
26b4bfc9a9SJens Wiklander #define GPIODAT U(0x8)  /* data register */
27b4bfc9a9SJens Wiklander #define GPIOIER U(0xc)  /* interrupt event register */
28b4bfc9a9SJens Wiklander #define GPIOIMR U(0x10) /* interrupt mask register */
29b4bfc9a9SJens Wiklander #define GPIOICR U(0x14) /* interrupt control register */
30b4bfc9a9SJens Wiklander #define GPIOIBE U(0x18) /* input buffer enable register */
3116c13b4dSManish Tomar 
3216c13b4dSManish Tomar /*
3316c13b4dSManish Tomar  * struct ls_gpio_chip_data describes GPIO controller chip instance
3416c13b4dSManish Tomar  * The structure contains below members:
3516c13b4dSManish Tomar  * chip:		generic GPIO chip handle.
3616c13b4dSManish Tomar  * gpio_base:		starting GPIO module base address managed by this GPIO
3716c13b4dSManish Tomar  *			controller.
3816c13b4dSManish Tomar  * gpio_controller:	GPIO controller to be used.
3916c13b4dSManish Tomar  */
4016c13b4dSManish Tomar struct ls_gpio_chip_data {
4116c13b4dSManish Tomar 	struct gpio_chip chip;
4216c13b4dSManish Tomar 	vaddr_t gpio_base;
4316c13b4dSManish Tomar 	uint8_t gpio_controller;
4416c13b4dSManish Tomar };
4516c13b4dSManish Tomar 
4616c13b4dSManish Tomar /*
4716c13b4dSManish Tomar  * Initialize GPIO Controller
4816c13b4dSManish Tomar  * gpio_data is a pointer of type 'struct ls_gpio_chip_data'.
4916c13b4dSManish Tomar  */
5016c13b4dSManish Tomar TEE_Result ls_gpio_init(struct ls_gpio_chip_data *gpio_data);
5116c13b4dSManish Tomar 
5216c13b4dSManish Tomar #endif /* __DRIVERS_LS_GPIO_H */
53