1 // SPDX-License-Identifier: BSD-3-Clause 2 /* 3 * Copyright (c) 2018-2019, STMicroelectronics 4 */ 5 6 #include <assert.h> 7 #include <drivers/stm32_rng.h> 8 #include <io.h> 9 #include <kernel/dt.h> 10 #include <kernel/delay.h> 11 #include <kernel/generic_boot.h> 12 #include <kernel/panic.h> 13 #include <mm/core_memprot.h> 14 #include <stdbool.h> 15 #include <stm32_util.h> 16 #include <string.h> 17 18 #ifdef CFG_DT 19 #include <libfdt.h> 20 #endif 21 22 #define DT_RNG_COMPAT "st,stm32-rng" 23 #define RNG_CR 0x00U 24 #define RNG_SR 0x04U 25 #define RNG_DR 0x08U 26 27 #define RNG_CR_RNGEN BIT(2) 28 #define RNG_CR_IE BIT(3) 29 #define RNG_CR_CED BIT(5) 30 31 #define RNG_SR_DRDY BIT(0) 32 #define RNG_SR_CECS BIT(1) 33 #define RNG_SR_SECS BIT(2) 34 #define RNG_SR_CEIS BIT(5) 35 #define RNG_SR_SEIS BIT(6) 36 37 #define RNG_TIMEOUT_US 1000 38 39 struct stm32_rng_instance { 40 struct io_pa_va base; 41 unsigned long clock; 42 unsigned int lock; 43 unsigned int refcount; 44 }; 45 46 static struct stm32_rng_instance *stm32_rng; 47 48 /* 49 * Extracts from the STM32 RNG specification: 50 * 51 * When a noise source (or seed) error occurs, the RNG stops generating 52 * random numbers and sets to “1” both SEIS and SECS bits to indicate 53 * that a seed error occurred. (...) 54 55 * The following sequence shall be used to fully recover from a seed 56 * error after the RNG initialization: 57 * 1. Clear the SEIS bit by writing it to “0”. 58 * 2. Read out 12 words from the RNG_DR register, and discard each of 59 * them in order to clean the pipeline. 60 * 3. Confirm that SEIS is still cleared. Random number generation is 61 * back to normal. 62 */ 63 static void conceal_seed_error(vaddr_t rng_base) 64 { 65 if (io_read32(rng_base + RNG_SR) & (RNG_SR_SECS | RNG_SR_SEIS)) { 66 size_t i = 0; 67 68 io_mask32(rng_base + RNG_SR, 0, RNG_SR_SEIS); 69 70 for (i = 12; i != 0; i--) 71 (void)io_read32(rng_base + RNG_DR); 72 73 if (io_read32(rng_base + RNG_SR) & RNG_SR_SEIS) 74 panic("RNG noise"); 75 } 76 } 77 78 #define RNG_FIFO_BYTE_DEPTH 16u 79 80 TEE_Result stm32_rng_read_raw(vaddr_t rng_base, uint8_t *out, size_t *size) 81 { 82 bool enabled = false; 83 TEE_Result rc = TEE_ERROR_SECURITY; 84 uint32_t exceptions = thread_mask_exceptions(THREAD_EXCP_ALL); 85 uint64_t timeout_ref = timeout_init_us(RNG_TIMEOUT_US); 86 87 if (!(io_read32(rng_base + RNG_CR) & RNG_CR_RNGEN)) { 88 /* Enable RNG if not, clock error is disabled */ 89 io_write32(rng_base + RNG_CR, RNG_CR_RNGEN | RNG_CR_CED); 90 enabled = true; 91 } 92 93 /* Wait RNG has produced well seeded random samples */ 94 while (!timeout_elapsed(timeout_ref)) { 95 conceal_seed_error(rng_base); 96 97 if (io_read32(rng_base + RNG_SR) & RNG_SR_DRDY) 98 break; 99 } 100 101 if (io_read32(rng_base + RNG_SR) & RNG_SR_DRDY) { 102 uint8_t *buf = out; 103 size_t req_size = MIN(RNG_FIFO_BYTE_DEPTH, *size); 104 size_t len = req_size; 105 106 /* RNG is ready: read up to 4 32bit words */ 107 while (len) { 108 uint32_t data32 = io_read32(rng_base + RNG_DR); 109 size_t sz = MIN(len, sizeof(uint32_t)); 110 111 memcpy(buf, &data32, sz); 112 buf += sz; 113 len -= sz; 114 } 115 rc = TEE_SUCCESS; 116 *size = req_size; 117 } 118 119 if (enabled) 120 io_write32(rng_base + RNG_CR, 0); 121 122 thread_unmask_exceptions(exceptions); 123 124 return rc; 125 } 126 127 static void gate_rng(bool enable, struct stm32_rng_instance *dev) 128 { 129 vaddr_t rng_cr = io_pa_or_va(&dev->base) + RNG_CR; 130 uint32_t exceptions = may_spin_lock(&dev->lock); 131 132 if (enable) { 133 /* incr_refcnt return non zero if resource shall be enabled */ 134 if (incr_refcnt(&dev->refcount)) { 135 stm32_clock_enable(dev->clock); 136 io_write32(rng_cr, 0); 137 io_write32(rng_cr, RNG_CR_RNGEN | RNG_CR_CED); 138 } 139 } else { 140 /* decr_refcnt return non zero if resource shall be disabled */ 141 if (decr_refcnt(&dev->refcount)) { 142 io_write32(rng_cr, 0); 143 stm32_clock_disable(dev->clock); 144 } 145 } 146 147 may_spin_unlock(&dev->lock, exceptions); 148 } 149 150 TEE_Result stm32_rng_read(uint8_t *out, size_t size) 151 { 152 TEE_Result rc = 0; 153 uint32_t exceptions = 0; 154 vaddr_t rng_base = io_pa_or_va(&stm32_rng->base); 155 uint8_t *out_ptr = out; 156 size_t out_size = 0; 157 158 if (!stm32_rng) { 159 DMSG("No RNG"); 160 return TEE_ERROR_NOT_SUPPORTED; 161 } 162 163 gate_rng(true, stm32_rng); 164 165 while (out_size < size) { 166 /* Read by chunks of the size the RNG FIFO depth */ 167 size_t sz = size - out_size; 168 169 exceptions = may_spin_lock(&stm32_rng->lock); 170 171 rc = stm32_rng_read_raw(rng_base, out_ptr, &sz); 172 173 may_spin_unlock(&stm32_rng->lock, exceptions); 174 175 if (rc) 176 goto bail; 177 178 out_size += sz; 179 out_ptr += sz; 180 } 181 182 bail: 183 gate_rng(false, stm32_rng); 184 if (rc) 185 memset(out, 0, size); 186 187 return rc; 188 } 189 190 #ifdef CFG_EMBED_DTB 191 static TEE_Result stm32_rng_init(void) 192 { 193 void *fdt = NULL; 194 int node = -1; 195 struct dt_node_info dt_info; 196 197 memset(&dt_info, 0, sizeof(dt_info)); 198 199 fdt = get_embedded_dt(); 200 if (!fdt) 201 panic(); 202 203 while (true) { 204 node = fdt_node_offset_by_compatible(fdt, node, DT_RNG_COMPAT); 205 if (node < 0) 206 break; 207 208 _fdt_fill_device_info(fdt, &dt_info, node); 209 210 if (!(dt_info.status & DT_STATUS_OK_SEC)) 211 continue; 212 213 if (stm32_rng) 214 panic(); 215 216 stm32_rng = calloc(1, sizeof(*stm32_rng)); 217 if (!stm32_rng) 218 panic(); 219 220 assert(dt_info.clock != DT_INFO_INVALID_CLOCK && 221 dt_info.reg != DT_INFO_INVALID_REG); 222 223 stm32_rng->base.pa = dt_info.reg; 224 stm32_rng->clock = (unsigned long)dt_info.clock; 225 226 DMSG("RNG init"); 227 } 228 229 return TEE_SUCCESS; 230 } 231 232 driver_init(stm32_rng_init); 233 #endif /*CFG_EMBED_DTB*/ 234