1 // SPDX-License-Identifier: BSD-3-Clause 2 /* 3 * Copyright (c) 2018-2019, STMicroelectronics 4 */ 5 6 #include <assert.h> 7 #include <drivers/clk.h> 8 #include <drivers/clk_dt.h> 9 #include <drivers/stm32_rng.h> 10 #include <io.h> 11 #include <kernel/delay.h> 12 #include <kernel/dt.h> 13 #include <kernel/boot.h> 14 #include <kernel/panic.h> 15 #include <kernel/thread.h> 16 #include <libfdt.h> 17 #include <mm/core_memprot.h> 18 #include <rng_support.h> 19 #include <stdbool.h> 20 #include <stm32_util.h> 21 #include <string.h> 22 #include <tee/tee_cryp_utl.h> 23 24 #define DT_RNG_COMPAT "st,stm32-rng" 25 #define RNG_CR 0x00U 26 #define RNG_SR 0x04U 27 #define RNG_DR 0x08U 28 29 #define RNG_CR_RNGEN BIT(2) 30 #define RNG_CR_IE BIT(3) 31 #define RNG_CR_CED BIT(5) 32 33 #define RNG_SR_DRDY BIT(0) 34 #define RNG_SR_CECS BIT(1) 35 #define RNG_SR_SECS BIT(2) 36 #define RNG_SR_CEIS BIT(5) 37 #define RNG_SR_SEIS BIT(6) 38 39 #define RNG_TIMEOUT_US U(100000) 40 41 struct stm32_rng_instance { 42 struct io_pa_va base; 43 struct clk *clock; 44 unsigned int lock; 45 unsigned int refcount; 46 bool release_post_boot; 47 }; 48 49 static struct stm32_rng_instance *stm32_rng; 50 51 /* 52 * Extracts from the STM32 RNG specification: 53 * 54 * When a noise source (or seed) error occurs, the RNG stops generating 55 * random numbers and sets to “1” both SEIS and SECS bits to indicate 56 * that a seed error occurred. (...) 57 58 * The following sequence shall be used to fully recover from a seed 59 * error after the RNG initialization: 60 * 1. Clear the SEIS bit by writing it to “0”. 61 * 2. Read out 12 words from the RNG_DR register, and discard each of 62 * them in order to clean the pipeline. 63 * 3. Confirm that SEIS is still cleared. Random number generation is 64 * back to normal. 65 */ 66 static void conceal_seed_error(vaddr_t rng_base) 67 { 68 if (io_read32(rng_base + RNG_SR) & (RNG_SR_SECS | RNG_SR_SEIS)) { 69 size_t i = 0; 70 71 io_mask32(rng_base + RNG_SR, 0, RNG_SR_SEIS); 72 73 for (i = 12; i != 0; i--) 74 (void)io_read32(rng_base + RNG_DR); 75 76 if (io_read32(rng_base + RNG_SR) & RNG_SR_SEIS) 77 panic("RNG noise"); 78 } 79 } 80 81 #define RNG_FIFO_BYTE_DEPTH 16u 82 83 static TEE_Result read_available(vaddr_t rng_base, uint8_t *out, size_t *size) 84 { 85 uint8_t *buf = NULL; 86 size_t req_size = 0; 87 size_t len = 0; 88 89 conceal_seed_error(rng_base); 90 91 if (!(io_read32(rng_base + RNG_SR) & RNG_SR_DRDY)) { 92 FMSG("RNG not ready"); 93 return TEE_ERROR_NO_DATA; 94 } 95 96 if (io_read32(rng_base + RNG_SR) & RNG_SR_SEIS) { 97 FMSG("RNG noise error"); 98 return TEE_ERROR_NO_DATA; 99 } 100 101 buf = out; 102 req_size = MIN(RNG_FIFO_BYTE_DEPTH, *size); 103 len = req_size; 104 105 /* RNG is ready: read up to 4 32bit words */ 106 while (len) { 107 uint32_t data32 = io_read32(rng_base + RNG_DR); 108 size_t sz = MIN(len, sizeof(uint32_t)); 109 110 memcpy(buf, &data32, sz); 111 buf += sz; 112 len -= sz; 113 } 114 115 *size = req_size; 116 117 return TEE_SUCCESS; 118 } 119 120 static void gate_rng(bool enable, struct stm32_rng_instance *dev) 121 { 122 vaddr_t rng_cr = io_pa_or_va(&dev->base, 1) + RNG_CR; 123 uint32_t exceptions = may_spin_lock(&dev->lock); 124 125 if (enable) { 126 /* incr_refcnt return non zero if resource shall be enabled */ 127 if (incr_refcnt(&dev->refcount)) { 128 FMSG("enable RNG"); 129 clk_enable(dev->clock); 130 io_write32(rng_cr, 0); 131 io_write32(rng_cr, RNG_CR_RNGEN | RNG_CR_CED); 132 } 133 } else { 134 /* decr_refcnt return non zero if resource shall be disabled */ 135 if (decr_refcnt(&dev->refcount)) { 136 FMSG("disable RNG"); 137 io_write32(rng_cr, 0); 138 clk_disable(dev->clock); 139 } 140 } 141 142 may_spin_unlock(&dev->lock, exceptions); 143 } 144 145 TEE_Result stm32_rng_read(uint8_t *out, size_t size) 146 { 147 TEE_Result rc = TEE_ERROR_GENERIC; 148 bool burst_timeout = false; 149 uint64_t timeout_ref = 0; 150 uint32_t exceptions = 0; 151 uint8_t *out_ptr = out; 152 vaddr_t rng_base = 0; 153 size_t out_size = 0; 154 155 if (!stm32_rng) { 156 DMSG("No RNG"); 157 return TEE_ERROR_NOT_SUPPORTED; 158 } 159 160 gate_rng(true, stm32_rng); 161 rng_base = io_pa_or_va(&stm32_rng->base, 1); 162 163 /* Arm timeout */ 164 timeout_ref = timeout_init_us(RNG_TIMEOUT_US); 165 burst_timeout = false; 166 167 while (out_size < size) { 168 /* Read by chunks of the size the RNG FIFO depth */ 169 size_t sz = size - out_size; 170 171 exceptions = may_spin_lock(&stm32_rng->lock); 172 173 rc = read_available(rng_base, out_ptr, &sz); 174 175 /* Raise timeout only if we failed to get some samples */ 176 assert(!rc || rc == TEE_ERROR_NO_DATA); 177 if (rc) 178 burst_timeout = timeout_elapsed(timeout_ref); 179 180 may_spin_unlock(&stm32_rng->lock, exceptions); 181 182 if (burst_timeout) { 183 rc = TEE_ERROR_GENERIC; 184 goto out; 185 } 186 187 if (!rc) { 188 out_size += sz; 189 out_ptr += sz; 190 /* Re-arm timeout */ 191 timeout_ref = timeout_init_us(RNG_TIMEOUT_US); 192 burst_timeout = false; 193 } 194 } 195 196 out: 197 assert(!rc || rc == TEE_ERROR_GENERIC); 198 gate_rng(false, stm32_rng); 199 200 return rc; 201 } 202 203 #ifdef CFG_WITH_SOFTWARE_PRNG 204 /* Override weak plat_rng_init with platform handler to seed PRNG */ 205 void plat_rng_init(void) 206 { 207 uint8_t seed[RNG_FIFO_BYTE_DEPTH] = { }; 208 209 if (stm32_rng_read(seed, sizeof(seed))) 210 panic(); 211 212 if (crypto_rng_init(seed, sizeof(seed))) 213 panic(); 214 215 DMSG("PRNG seeded with RNG"); 216 } 217 #else 218 TEE_Result hw_get_random_bytes(void *out, size_t size) 219 { 220 return stm32_rng_read(out, size); 221 } 222 #endif 223 224 #ifdef CFG_EMBED_DTB 225 static TEE_Result stm32_rng_init(void) 226 { 227 void *fdt = NULL; 228 int node = -1; 229 struct dt_node_info dt_info; 230 TEE_Result res = TEE_ERROR_GENERIC; 231 232 memset(&dt_info, 0, sizeof(dt_info)); 233 234 fdt = get_embedded_dt(); 235 if (!fdt) 236 panic(); 237 238 while (true) { 239 node = fdt_node_offset_by_compatible(fdt, node, DT_RNG_COMPAT); 240 if (node < 0) 241 break; 242 243 _fdt_fill_device_info(fdt, &dt_info, node); 244 245 if (!(dt_info.status & DT_STATUS_OK_SEC)) 246 continue; 247 248 if (stm32_rng) 249 panic(); 250 251 stm32_rng = calloc(1, sizeof(*stm32_rng)); 252 if (!stm32_rng) 253 panic(); 254 255 assert(dt_info.clock != DT_INFO_INVALID_CLOCK && 256 dt_info.reg != DT_INFO_INVALID_REG && 257 dt_info.reg_size != DT_INFO_INVALID_REG_SIZE); 258 259 if (dt_info.status & DT_STATUS_OK_NSEC) { 260 stm32mp_register_non_secure_periph_iomem(dt_info.reg); 261 stm32_rng->release_post_boot = true; 262 } else { 263 stm32mp_register_secure_periph_iomem(dt_info.reg); 264 } 265 266 stm32_rng->base.pa = dt_info.reg; 267 if (!io_pa_or_va_secure(&stm32_rng->base, dt_info.reg_size)) 268 panic(); 269 270 res = clk_dt_get_by_index(fdt, node, 0, &stm32_rng->clock); 271 if (res) 272 return res; 273 274 assert(stm32_rng->clock); 275 276 DMSG("RNG init"); 277 } 278 279 return TEE_SUCCESS; 280 } 281 282 early_init_late(stm32_rng_init); 283 284 static TEE_Result stm32_rng_release(void) 285 { 286 if (stm32_rng && stm32_rng->release_post_boot) { 287 DMSG("Release RNG driver"); 288 assert(!stm32_rng->refcount); 289 free(stm32_rng); 290 stm32_rng = NULL; 291 } 292 293 return TEE_SUCCESS; 294 } 295 296 release_init_resource(stm32_rng_release); 297 #endif /*CFG_EMBED_DTB*/ 298