1 /* 2 * Copyright (c) 2016, Spreadtrum Communications Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright notice, 12 * this list of conditions and the following disclaimer in the documentation 13 * and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 #include <io.h> 28 #include <drivers/sprd_uart.h> 29 30 /* Register definitions */ 31 #define UART_TXD 0x0000 32 #define UART_RXD 0x0004 33 #define UART_STS1 0x000C /* data number in TX and RX fifo */ 34 35 /* Register Bit Fields*/ 36 #define STS1_RXF_CNT_MASK 0x00ff /* Rx FIFO data counter mask */ 37 #define STS1_TXF_CNT_MASK 0xff00 /* Tx FIFO data counter mask */ 38 39 static uint32_t sprd_uart_read(vaddr_t base, uint32_t reg) 40 { 41 return read32(base + reg); 42 } 43 44 static void sprd_uart_write(vaddr_t base, uint32_t reg, uint32_t value) 45 { 46 write32(value, base + reg); 47 } 48 49 static void sprd_uart_wait_xmit_done(vaddr_t base) 50 { 51 while (sprd_uart_read(base, UART_STS1) & STS1_TXF_CNT_MASK) 52 ; 53 } 54 55 static void sprd_uart_wait_rx_data(vaddr_t base) 56 { 57 while (!(sprd_uart_read(base, UART_STS1) & STS1_RXF_CNT_MASK)) 58 ; 59 } 60 61 void sprd_uart_flush(vaddr_t base) 62 { 63 sprd_uart_wait_xmit_done(base); 64 } 65 66 void sprd_uart_putc(vaddr_t base, unsigned char ch) 67 { 68 sprd_uart_wait_xmit_done(base); 69 70 sprd_uart_write(base, UART_TXD, (uint32_t)ch); 71 } 72 73 unsigned char sprd_uart_getc(vaddr_t base) 74 { 75 sprd_uart_wait_rx_data(base); 76 77 return sprd_uart_read(base, UART_RXD) & 0xff; 78 } 79