1 /* 2 * Copyright (c) 2016, Spreadtrum Communications Inc. 3 * Copyright (c) 2017, Linaro Limited 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright notice, 10 * this list of conditions and the following disclaimer. 11 * 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 #include <drivers/sprd_uart.h> 29 #include <io.h> 30 #include <keep.h> 31 #include <util.h> 32 33 /* Register definitions */ 34 #define UART_TXD 0x0000 35 #define UART_RXD 0x0004 36 #define UART_STS1 0x000C /* data number in TX and RX fifo */ 37 38 /* Register Bit Fields*/ 39 #define STS1_RXF_CNT_MASK 0x00ff /* Rx FIFO data counter mask */ 40 #define STS1_TXF_CNT_MASK 0xff00 /* Tx FIFO data counter mask */ 41 42 static vaddr_t chip_to_base(struct serial_chip *chip) 43 { 44 struct sprd_uart_data *pd = 45 container_of(chip, struct sprd_uart_data, chip); 46 47 return io_pa_or_va(&pd->base); 48 } 49 50 static void sprd_uart_flush(struct serial_chip *chip) 51 { 52 vaddr_t base = chip_to_base(chip); 53 54 while (read32(base + UART_STS1) & STS1_TXF_CNT_MASK) 55 ; 56 } 57 58 static bool sprd_uart_have_rx_data(struct serial_chip *chip) 59 { 60 vaddr_t base = chip_to_base(chip); 61 62 return !!(read32(base + UART_STS1) & STS1_RXF_CNT_MASK); 63 } 64 65 static void sprd_uart_putc(struct serial_chip *chip, int ch) 66 { 67 vaddr_t base = chip_to_base(chip); 68 69 sprd_uart_flush(chip); 70 write32(base + UART_TXD, ch); 71 } 72 73 static int sprd_uart_getchar(struct serial_chip *chip) 74 { 75 vaddr_t base = chip_to_base(chip); 76 77 while (!sprd_uart_have_rx_data(chip)) 78 ; 79 80 return read32(base + UART_RXD) & 0xff; 81 } 82 83 static const struct serial_ops sprd_uart_ops = { 84 .flush = sprd_uart_flush, 85 .getchar = sprd_uart_getchar, 86 .have_rx_data = sprd_uart_have_rx_data, 87 .putc = sprd_uart_putc, 88 }; 89 KEEP_PAGER(sprd_uart_ops); 90 91 void sprd_uart_init(struct sprd_uart_data *pd, paddr_t base) 92 { 93 pd->base.pa = base; 94 pd->chip.ops = &sprd_uart_ops; 95 } 96