1*44bd24c5SJames Kung /* 2*44bd24c5SJames Kung * Copyright (c) 2015, Linaro Limited 3*44bd24c5SJames Kung * All rights reserved. 4*44bd24c5SJames Kung * 5*44bd24c5SJames Kung * Redistribution and use in source and binary forms, with or without 6*44bd24c5SJames Kung * modification, are permitted provided that the following conditions are met: 7*44bd24c5SJames Kung * 8*44bd24c5SJames Kung * 1. Redistributions of source code must retain the above copyright notice, 9*44bd24c5SJames Kung * this list of conditions and the following disclaimer. 10*44bd24c5SJames Kung * 11*44bd24c5SJames Kung * 2. Redistributions in binary form must reproduce the above copyright notice, 12*44bd24c5SJames Kung * this list of conditions and the following disclaimer in the documentation 13*44bd24c5SJames Kung * and/or other materials provided with the distribution. 14*44bd24c5SJames Kung * 15*44bd24c5SJames Kung * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16*44bd24c5SJames Kung * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17*44bd24c5SJames Kung * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18*44bd24c5SJames Kung * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 19*44bd24c5SJames Kung * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20*44bd24c5SJames Kung * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21*44bd24c5SJames Kung * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22*44bd24c5SJames Kung * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23*44bd24c5SJames Kung * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24*44bd24c5SJames Kung * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25*44bd24c5SJames Kung * POSSIBILITY OF SUCH DAMAGE. 26*44bd24c5SJames Kung */ 27*44bd24c5SJames Kung #include <platform_config.h> 28*44bd24c5SJames Kung 29*44bd24c5SJames Kung #include <drivers/serial8250_uart.h> 30*44bd24c5SJames Kung #include <console.h> 31*44bd24c5SJames Kung #include <io.h> 32*44bd24c5SJames Kung #include <assert.h> 33*44bd24c5SJames Kung #include <compiler.h> 34*44bd24c5SJames Kung 35*44bd24c5SJames Kung /* uart register defines */ 36*44bd24c5SJames Kung #define UART_RHR 0x0 37*44bd24c5SJames Kung #define UART_THR 0x0 38*44bd24c5SJames Kung #define UART_IER 0x4 39*44bd24c5SJames Kung #define UART_ISR 0x8 40*44bd24c5SJames Kung #define UART_FCR 0x8 41*44bd24c5SJames Kung #define UART_LCR 0xc 42*44bd24c5SJames Kung #define UART_MCR 0x10 43*44bd24c5SJames Kung #define UART_LSR 0x14 44*44bd24c5SJames Kung #define UART_MSR 0x18 45*44bd24c5SJames Kung #define UART_SPR 0x1c 46*44bd24c5SJames Kung 47*44bd24c5SJames Kung /* uart status register bits */ 48*44bd24c5SJames Kung #define LSR_TEMT 0x40 /* Transmitter empty */ 49*44bd24c5SJames Kung #define LSR_THRE 0x20 /* Transmit-hold-register empty */ 50*44bd24c5SJames Kung #define LSR_EMPTY (LSR_TEMT | LSR_THRE) 51*44bd24c5SJames Kung #define LSR_DR 0x01 /* DATA Ready */ 52*44bd24c5SJames Kung 53*44bd24c5SJames Kung void serial8250_uart_init(vaddr_t __unused base, 54*44bd24c5SJames Kung uint32_t __unused uart_clk, uint32_t __unused baud_rate) 55*44bd24c5SJames Kung { 56*44bd24c5SJames Kung /* 57*44bd24c5SJames Kung * do nothing, debug uart(uart0) share with normal world, 58*44bd24c5SJames Kung * everything for uart0 is ready now. 59*44bd24c5SJames Kung */ 60*44bd24c5SJames Kung } 61*44bd24c5SJames Kung 62*44bd24c5SJames Kung void serial8250_uart_flush_tx_fifo(vaddr_t base) 63*44bd24c5SJames Kung { 64*44bd24c5SJames Kung while (1) { 65*44bd24c5SJames Kung uint8_t state = read8(base + UART_LSR); 66*44bd24c5SJames Kung 67*44bd24c5SJames Kung /* waiting transmit fifo empty */ 68*44bd24c5SJames Kung if ((state & LSR_EMPTY) == LSR_EMPTY) 69*44bd24c5SJames Kung break; 70*44bd24c5SJames Kung } 71*44bd24c5SJames Kung } 72*44bd24c5SJames Kung 73*44bd24c5SJames Kung bool serial8250_uart_have_rx_data(vaddr_t base) 74*44bd24c5SJames Kung { 75*44bd24c5SJames Kung return (read32(base + UART_LSR) & LSR_DR); 76*44bd24c5SJames Kung } 77*44bd24c5SJames Kung 78*44bd24c5SJames Kung void serial8250_uart_putc(int ch, vaddr_t base) 79*44bd24c5SJames Kung { 80*44bd24c5SJames Kung serial8250_uart_flush_tx_fifo(base); 81*44bd24c5SJames Kung 82*44bd24c5SJames Kung /* write out charset to transmit fifo */ 83*44bd24c5SJames Kung write8(ch, base + UART_THR); 84*44bd24c5SJames Kung } 85*44bd24c5SJames Kung 86*44bd24c5SJames Kung int serial8250_uart_getchar(vaddr_t base) 87*44bd24c5SJames Kung { 88*44bd24c5SJames Kung while (!serial8250_uart_have_rx_data(base)) { 89*44bd24c5SJames Kung /* transmit fifo is empty, waiting again. */ 90*44bd24c5SJames Kung ; 91*44bd24c5SJames Kung } 92*44bd24c5SJames Kung return read8(base + UART_RHR); 93*44bd24c5SJames Kung } 94*44bd24c5SJames Kung 95