xref: /optee_os/core/drivers/ns16550.c (revision 8d94060ae272f7461905b504642fc16341a222af)
185278139SSumit Garg /*
285278139SSumit Garg  * Copyright (C) 2015 Freescale Semiconductor, Inc.
32e5aa31bSJerome Forissier  * Copyright (c) 2017, Linaro Limited
485278139SSumit Garg  * All rights reserved.
585278139SSumit Garg  *
685278139SSumit Garg  * Redistribution and use in source and binary forms, with or without
785278139SSumit Garg  * modification, are permitted provided that the following conditions are met:
885278139SSumit Garg  *
985278139SSumit Garg  * 1. Redistributions of source code must retain the above copyright notice,
1085278139SSumit Garg  * this list of conditions and the following disclaimer.
1185278139SSumit Garg  *
1285278139SSumit Garg  * 2. Redistributions in binary form must reproduce the above copyright notice,
1385278139SSumit Garg  * this list of conditions and the following disclaimer in the documentation
1485278139SSumit Garg  * and/or other materials provided with the distribution.
1585278139SSumit Garg  *
1685278139SSumit Garg  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
1785278139SSumit Garg  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
1885278139SSumit Garg  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
1985278139SSumit Garg  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
2085278139SSumit Garg  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2185278139SSumit Garg  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2285278139SSumit Garg  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2385278139SSumit Garg  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2485278139SSumit Garg  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2585278139SSumit Garg  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
2685278139SSumit Garg  * POSSIBILITY OF SUCH DAMAGE.
2785278139SSumit Garg  */
2885278139SSumit Garg 
2985278139SSumit Garg #include <drivers/ns16550.h>
3085278139SSumit Garg #include <io.h>
31*8d94060aSEtienne Carriere #include <keep.h>
322e5aa31bSJerome Forissier #include <util.h>
3385278139SSumit Garg 
3485278139SSumit Garg /* uart register defines */
3585278139SSumit Garg #define UART_RBR	0x0
3685278139SSumit Garg #define UART_THR	0x0
3785278139SSumit Garg #define UART_IER	0x1
3885278139SSumit Garg #define UART_FCR	0x2
3985278139SSumit Garg #define UART_LCR	0x3
4085278139SSumit Garg #define UART_MCR	0x4
4185278139SSumit Garg #define UART_LSR	0x5
4285278139SSumit Garg #define UART_MSR	0x6
4385278139SSumit Garg #define UART_SPR	0x7
4485278139SSumit Garg 
4585278139SSumit Garg /* uart status register bits */
4685278139SSumit Garg #define UART_LSR_THRE	0x20 /* Transmit-hold-register empty */
4785278139SSumit Garg 
482e5aa31bSJerome Forissier static vaddr_t chip_to_base(struct serial_chip *chip)
4985278139SSumit Garg {
502e5aa31bSJerome Forissier 	struct ns16550_data *pd =
512e5aa31bSJerome Forissier 		container_of(chip, struct ns16550_data, chip);
522e5aa31bSJerome Forissier 
532e5aa31bSJerome Forissier 	return io_pa_or_va(&pd->base);
542e5aa31bSJerome Forissier }
552e5aa31bSJerome Forissier 
562e5aa31bSJerome Forissier static void ns16550_flush(struct serial_chip *chip)
572e5aa31bSJerome Forissier {
582e5aa31bSJerome Forissier 	vaddr_t base = chip_to_base(chip);
592e5aa31bSJerome Forissier 
6085278139SSumit Garg 	while ((read8(base + UART_LSR) & UART_LSR_THRE) == 0)
6185278139SSumit Garg 		;
6285278139SSumit Garg }
6385278139SSumit Garg 
642e5aa31bSJerome Forissier static void ns16550_putc(struct serial_chip *chip, int ch)
6585278139SSumit Garg {
662e5aa31bSJerome Forissier 	vaddr_t base = chip_to_base(chip);
672e5aa31bSJerome Forissier 
682e5aa31bSJerome Forissier 	ns16550_flush(chip);
6985278139SSumit Garg 
7085278139SSumit Garg 	/* write out charset to Transmit-hold-register */
7185278139SSumit Garg 	write8(ch, base + UART_THR);
7285278139SSumit Garg }
732e5aa31bSJerome Forissier 
742e5aa31bSJerome Forissier static const struct serial_ops ns16550_ops = {
752e5aa31bSJerome Forissier 	.flush = ns16550_flush,
762e5aa31bSJerome Forissier 	.putc = ns16550_putc,
772e5aa31bSJerome Forissier };
78*8d94060aSEtienne Carriere KEEP_PAGER(ns16550_ops);
792e5aa31bSJerome Forissier 
802e5aa31bSJerome Forissier void ns16550_init(struct ns16550_data *pd, paddr_t base)
812e5aa31bSJerome Forissier {
822e5aa31bSJerome Forissier 	pd->base.pa = base;
832e5aa31bSJerome Forissier 	pd->chip.ops = &ns16550_ops;
842e5aa31bSJerome Forissier 
852e5aa31bSJerome Forissier 	/*
862e5aa31bSJerome Forissier 	 * Do nothing, uart driver shared with normal world,
872e5aa31bSJerome Forissier 	 * everything for uart driver initialization is done in bootloader.
882e5aa31bSJerome Forissier 	 */
892e5aa31bSJerome Forissier }
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