xref: /optee_os/core/drivers/ns16550.c (revision 3639b55f101b2c3bba33740ec7bf5440b3125efc)
11bb92983SJerome Forissier // SPDX-License-Identifier: BSD-2-Clause
285278139SSumit Garg /*
385278139SSumit Garg  * Copyright (C) 2015 Freescale Semiconductor, Inc.
42e5aa31bSJerome Forissier  * Copyright (c) 2017, Linaro Limited
585278139SSumit Garg  * All rights reserved.
685278139SSumit Garg  *
785278139SSumit Garg  * Redistribution and use in source and binary forms, with or without
885278139SSumit Garg  * modification, are permitted provided that the following conditions are met:
985278139SSumit Garg  *
1085278139SSumit Garg  * 1. Redistributions of source code must retain the above copyright notice,
1185278139SSumit Garg  * this list of conditions and the following disclaimer.
1285278139SSumit Garg  *
1385278139SSumit Garg  * 2. Redistributions in binary form must reproduce the above copyright notice,
1485278139SSumit Garg  * this list of conditions and the following disclaimer in the documentation
1585278139SSumit Garg  * and/or other materials provided with the distribution.
1685278139SSumit Garg  *
1785278139SSumit Garg  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
1885278139SSumit Garg  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
1985278139SSumit Garg  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2085278139SSumit Garg  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
2185278139SSumit Garg  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2285278139SSumit Garg  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2385278139SSumit Garg  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2485278139SSumit Garg  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2585278139SSumit Garg  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2685278139SSumit Garg  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
2785278139SSumit Garg  * POSSIBILITY OF SUCH DAMAGE.
2885278139SSumit Garg  */
2985278139SSumit Garg 
3085278139SSumit Garg #include <drivers/ns16550.h>
3185278139SSumit Garg #include <io.h>
328d94060aSEtienne Carriere #include <keep.h>
332e5aa31bSJerome Forissier #include <util.h>
3485278139SSumit Garg 
3585278139SSumit Garg /* uart register defines */
3685278139SSumit Garg #define UART_RBR	0x0
3785278139SSumit Garg #define UART_THR	0x0
3885278139SSumit Garg #define UART_IER	0x1
3985278139SSumit Garg #define UART_FCR	0x2
4085278139SSumit Garg #define UART_LCR	0x3
4185278139SSumit Garg #define UART_MCR	0x4
4285278139SSumit Garg #define UART_LSR	0x5
4385278139SSumit Garg #define UART_MSR	0x6
4485278139SSumit Garg #define UART_SPR	0x7
4585278139SSumit Garg 
4685278139SSumit Garg /* uart status register bits */
4785278139SSumit Garg #define UART_LSR_THRE	0x20 /* Transmit-hold-register empty */
4885278139SSumit Garg 
492e5aa31bSJerome Forissier static vaddr_t chip_to_base(struct serial_chip *chip)
5085278139SSumit Garg {
512e5aa31bSJerome Forissier 	struct ns16550_data *pd =
522e5aa31bSJerome Forissier 		container_of(chip, struct ns16550_data, chip);
532e5aa31bSJerome Forissier 
542e5aa31bSJerome Forissier 	return io_pa_or_va(&pd->base);
552e5aa31bSJerome Forissier }
562e5aa31bSJerome Forissier 
572e5aa31bSJerome Forissier static void ns16550_flush(struct serial_chip *chip)
582e5aa31bSJerome Forissier {
592e5aa31bSJerome Forissier 	vaddr_t base = chip_to_base(chip);
602e5aa31bSJerome Forissier 
61918bb3a5SEtienne Carriere 	while ((io_read8(base + UART_LSR) & UART_LSR_THRE) == 0)
6285278139SSumit Garg 		;
6385278139SSumit Garg }
6485278139SSumit Garg 
652e5aa31bSJerome Forissier static void ns16550_putc(struct serial_chip *chip, int ch)
6685278139SSumit Garg {
672e5aa31bSJerome Forissier 	vaddr_t base = chip_to_base(chip);
682e5aa31bSJerome Forissier 
692e5aa31bSJerome Forissier 	ns16550_flush(chip);
7085278139SSumit Garg 
7185278139SSumit Garg 	/* write out charset to Transmit-hold-register */
72918bb3a5SEtienne Carriere 	io_write8(base + UART_THR, ch);
7385278139SSumit Garg }
742e5aa31bSJerome Forissier 
752e5aa31bSJerome Forissier static const struct serial_ops ns16550_ops = {
762e5aa31bSJerome Forissier 	.flush = ns16550_flush,
772e5aa31bSJerome Forissier 	.putc = ns16550_putc,
782e5aa31bSJerome Forissier };
79*3639b55fSJerome Forissier DECLARE_KEEP_PAGER(ns16550_ops);
802e5aa31bSJerome Forissier 
812e5aa31bSJerome Forissier void ns16550_init(struct ns16550_data *pd, paddr_t base)
822e5aa31bSJerome Forissier {
832e5aa31bSJerome Forissier 	pd->base.pa = base;
842e5aa31bSJerome Forissier 	pd->chip.ops = &ns16550_ops;
852e5aa31bSJerome Forissier 
862e5aa31bSJerome Forissier 	/*
872e5aa31bSJerome Forissier 	 * Do nothing, uart driver shared with normal world,
882e5aa31bSJerome Forissier 	 * everything for uart driver initialization is done in bootloader.
892e5aa31bSJerome Forissier 	 */
902e5aa31bSJerome Forissier }
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