xref: /optee_os/core/drivers/ns16550.c (revision 503ea15783027db8c163ff8dde0ab474c0bd5759)
11bb92983SJerome Forissier // SPDX-License-Identifier: BSD-2-Clause
285278139SSumit Garg /*
385278139SSumit Garg  * Copyright (C) 2015 Freescale Semiconductor, Inc.
41eacd17cSSumit Garg  * Copyright (c) 2017, 2020, Linaro Limited
585278139SSumit Garg  * All rights reserved.
685278139SSumit Garg  *
785278139SSumit Garg  * Redistribution and use in source and binary forms, with or without
885278139SSumit Garg  * modification, are permitted provided that the following conditions are met:
985278139SSumit Garg  *
1085278139SSumit Garg  * 1. Redistributions of source code must retain the above copyright notice,
1185278139SSumit Garg  * this list of conditions and the following disclaimer.
1285278139SSumit Garg  *
1385278139SSumit Garg  * 2. Redistributions in binary form must reproduce the above copyright notice,
1485278139SSumit Garg  * this list of conditions and the following disclaimer in the documentation
1585278139SSumit Garg  * and/or other materials provided with the distribution.
1685278139SSumit Garg  *
1785278139SSumit Garg  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
1885278139SSumit Garg  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
1985278139SSumit Garg  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2085278139SSumit Garg  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
2185278139SSumit Garg  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2285278139SSumit Garg  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2385278139SSumit Garg  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2485278139SSumit Garg  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2585278139SSumit Garg  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2685278139SSumit Garg  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
2785278139SSumit Garg  * POSSIBILITY OF SUCH DAMAGE.
2885278139SSumit Garg  */
2985278139SSumit Garg 
3085278139SSumit Garg #include <drivers/ns16550.h>
318d94060aSEtienne Carriere #include <keep.h>
322e5aa31bSJerome Forissier #include <util.h>
3385278139SSumit Garg 
3485278139SSumit Garg /* uart register defines */
3585278139SSumit Garg #define UART_RBR	0x0
3685278139SSumit Garg #define UART_THR	0x0
3785278139SSumit Garg #define UART_IER	0x1
3885278139SSumit Garg #define UART_FCR	0x2
3985278139SSumit Garg #define UART_LCR	0x3
4085278139SSumit Garg #define UART_MCR	0x4
4185278139SSumit Garg #define UART_LSR	0x5
4285278139SSumit Garg #define UART_MSR	0x6
4385278139SSumit Garg #define UART_SPR	0x7
4485278139SSumit Garg 
4585278139SSumit Garg /* uart status register bits */
46*503ea157SAlvin Chang #define UART_LSR_DR	0x01 /* DATA Ready */
4785278139SSumit Garg #define UART_LSR_THRE	0x20 /* Transmit-hold-register empty */
4885278139SSumit Garg 
chip_to_base_and_data(struct serial_chip * chip,struct ns16550_data ** pd)49199cc636SAlvin Chang static vaddr_t chip_to_base_and_data(struct serial_chip *chip,
50199cc636SAlvin Chang 				     struct ns16550_data **pd)
51199cc636SAlvin Chang {
52199cc636SAlvin Chang 	*pd = container_of(chip, struct ns16550_data, chip);
53199cc636SAlvin Chang 
54199cc636SAlvin Chang 	return io_pa_or_va(&(*pd)->base, NS16550_UART_REG_SIZE);
55199cc636SAlvin Chang }
56199cc636SAlvin Chang 
ns16550_flush(struct serial_chip * chip)571eacd17cSSumit Garg static void ns16550_flush(struct serial_chip *chip)
5885278139SSumit Garg {
59199cc636SAlvin Chang 	struct ns16550_data *pd = NULL;
60199cc636SAlvin Chang 	vaddr_t base = chip_to_base_and_data(chip, &pd);
612e5aa31bSJerome Forissier 
621eacd17cSSumit Garg 	while ((serial_in(base + (UART_LSR << pd->reg_shift), pd->io_width) &
631eacd17cSSumit Garg 		UART_LSR_THRE) == 0)
6485278139SSumit Garg 		;
6585278139SSumit Garg }
6685278139SSumit Garg 
ns16550_putc(struct serial_chip * chip,int ch)672e5aa31bSJerome Forissier static void ns16550_putc(struct serial_chip *chip, int ch)
6885278139SSumit Garg {
69199cc636SAlvin Chang 	struct ns16550_data *pd = NULL;
70199cc636SAlvin Chang 	vaddr_t base = chip_to_base_and_data(chip, &pd);
712e5aa31bSJerome Forissier 
722e5aa31bSJerome Forissier 	ns16550_flush(chip);
7385278139SSumit Garg 
7485278139SSumit Garg 	/* write out charset to Transmit-hold-register */
751eacd17cSSumit Garg 	serial_out(base + (UART_THR << pd->reg_shift), pd->io_width, ch);
7685278139SSumit Garg }
772e5aa31bSJerome Forissier 
ns16550_have_rx_data(struct serial_chip * chip)78*503ea157SAlvin Chang static bool ns16550_have_rx_data(struct serial_chip *chip)
79*503ea157SAlvin Chang {
80*503ea157SAlvin Chang 	struct ns16550_data *pd = NULL;
81*503ea157SAlvin Chang 	vaddr_t base = chip_to_base_and_data(chip, &pd);
82*503ea157SAlvin Chang 
83*503ea157SAlvin Chang 	return serial_in(base + (UART_LSR << pd->reg_shift), pd->io_width) &
84*503ea157SAlvin Chang 	       UART_LSR_DR;
85*503ea157SAlvin Chang }
86*503ea157SAlvin Chang 
ns16550_getchar(struct serial_chip * chip)87*503ea157SAlvin Chang static int ns16550_getchar(struct serial_chip *chip)
88*503ea157SAlvin Chang {
89*503ea157SAlvin Chang 	struct ns16550_data *pd = NULL;
90*503ea157SAlvin Chang 	vaddr_t base = chip_to_base_and_data(chip, &pd);
91*503ea157SAlvin Chang 
92*503ea157SAlvin Chang 	while (!ns16550_have_rx_data(chip)) {
93*503ea157SAlvin Chang 		/* Data is not ready, waiting again */
94*503ea157SAlvin Chang 		;
95*503ea157SAlvin Chang 	}
96*503ea157SAlvin Chang 
97*503ea157SAlvin Chang 	return serial_in(base + (UART_RBR << pd->reg_shift), pd->io_width) &
98*503ea157SAlvin Chang 	       0xFF;
99*503ea157SAlvin Chang }
100*503ea157SAlvin Chang 
1012e5aa31bSJerome Forissier static const struct serial_ops ns16550_ops = {
1022e5aa31bSJerome Forissier 	.flush = ns16550_flush,
1032e5aa31bSJerome Forissier 	.putc = ns16550_putc,
104*503ea157SAlvin Chang 	.getchar = ns16550_getchar,
105*503ea157SAlvin Chang 	.have_rx_data = ns16550_have_rx_data,
1062e5aa31bSJerome Forissier };
1073639b55fSJerome Forissier DECLARE_KEEP_PAGER(ns16550_ops);
1082e5aa31bSJerome Forissier 
ns16550_init(struct ns16550_data * pd,paddr_t base,uint8_t io_width,uint8_t reg_shift)1091eacd17cSSumit Garg void ns16550_init(struct ns16550_data *pd, paddr_t base, uint8_t io_width,
1101eacd17cSSumit Garg 		  uint8_t reg_shift)
1112e5aa31bSJerome Forissier {
1122e5aa31bSJerome Forissier 	pd->base.pa = base;
1131eacd17cSSumit Garg 	pd->io_width = io_width;
1141eacd17cSSumit Garg 	pd->reg_shift = reg_shift;
1152e5aa31bSJerome Forissier 	pd->chip.ops = &ns16550_ops;
1162e5aa31bSJerome Forissier 
1172e5aa31bSJerome Forissier 	/*
1182e5aa31bSJerome Forissier 	 * Do nothing, uart driver shared with normal world,
1192e5aa31bSJerome Forissier 	 * everything for uart driver initialization is done in bootloader.
1202e5aa31bSJerome Forissier 	 */
1212e5aa31bSJerome Forissier }
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