1 // SPDX-License-Identifier: BSD-2-Clause 2 /* 3 * Copyright 2017 NXP 4 * 5 * Peng Fan <peng.fan@nxp.com> 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are met: 9 * 10 * 1. Redistributions of source code must retain the above copyright notice, 11 * this list of conditions and the following disclaimer. 12 * 13 * 2. Redistributions in binary form must reproduce the above copyright notice, 14 * this list of conditions and the following disclaimer in the documentation 15 * and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 21 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 #include <assert.h> 31 #include <drivers/imx_wdog.h> 32 #include <io.h> 33 #include <keep.h> 34 #include <kernel/dt.h> 35 #include <kernel/generic_boot.h> 36 #include <kernel/panic.h> 37 #ifdef CFG_DT 38 #include <libfdt.h> 39 #endif 40 #include <mm/core_mmu.h> 41 #include <mm/core_memprot.h> 42 #include <util.h> 43 44 static bool ext_reset; 45 static vaddr_t wdog_base; 46 47 void imx_wdog_restart(void) 48 { 49 uint32_t val; 50 51 if (!wdog_base) { 52 EMSG("No wdog mapped\n"); 53 panic(); 54 } 55 56 if (ext_reset) 57 val = 0x14; 58 else 59 val = 0x24; 60 61 DMSG("val %x\n", val); 62 63 write16(val, wdog_base + WDT_WCR); 64 dsb(); 65 66 if (read16(wdog_base + WDT_WCR) & WDT_WCR_WDE) { 67 write16(WDT_SEQ1, wdog_base + WDT_WSR); 68 write16(WDT_SEQ2, wdog_base + WDT_WSR); 69 } 70 71 write16(val, wdog_base + WDT_WCR); 72 write16(val, wdog_base + WDT_WCR); 73 74 while (1) 75 ; 76 } 77 KEEP_PAGER(imx_wdog_restart); 78 79 #if defined(CFG_DT) && !defined(CFG_EXTERNAL_DTB_OVERLAY) 80 static TEE_Result imx_wdog_base(vaddr_t *wdog_vbase) 81 { 82 enum teecore_memtypes mtype; 83 void *fdt; 84 paddr_t pbase; 85 vaddr_t vbase; 86 ssize_t sz; 87 int off; 88 int st; 89 uint32_t i; 90 91 #ifdef CFG_MX7 92 static const char * const wdog_path[] = { 93 "/soc/aips-bus@30000000/wdog@30280000", 94 "/soc/aips-bus@30000000/wdog@30290000", 95 "/soc/aips-bus@30000000/wdog@302a0000", 96 "/soc/aips-bus@30000000/wdog@302b0000", 97 }; 98 #else 99 static const char * const wdog_path[] = { 100 "/soc/aips-bus@2000000/wdog@20bc000", 101 "/soc/aips-bus@2000000/wdog@20c0000", 102 }; 103 #endif 104 105 fdt = get_dt(); 106 if (!fdt) { 107 EMSG("No DTB\n"); 108 return TEE_ERROR_NOT_SUPPORTED; 109 } 110 111 /* search the first usable wdog */ 112 for (i = 0; i < ARRAY_SIZE(wdog_path); i++) { 113 off = fdt_path_offset(fdt, wdog_path[i]); 114 if (off < 0) 115 continue; 116 117 st = _fdt_get_status(fdt, off); 118 if (st & DT_STATUS_OK_SEC) 119 break; 120 } 121 122 if (i == ARRAY_SIZE(wdog_path)) 123 return TEE_ERROR_ITEM_NOT_FOUND; 124 125 DMSG("path: %s\n", wdog_path[i]); 126 127 ext_reset = dt_have_prop(fdt, off, "fsl,ext-reset-output"); 128 129 pbase = _fdt_reg_base_address(fdt, off); 130 if (pbase == (paddr_t)-1) 131 return TEE_ERROR_ITEM_NOT_FOUND; 132 133 sz = _fdt_reg_size(fdt, off); 134 if (sz < 0) 135 return TEE_ERROR_ITEM_NOT_FOUND; 136 137 if ((st & DT_STATUS_OK_SEC) && !(st & DT_STATUS_OK_NSEC)) 138 mtype = MEM_AREA_IO_SEC; 139 else 140 mtype = MEM_AREA_IO_NSEC; 141 142 /* 143 * Check to see whether it has been mapped using 144 * register_phys_mem or not. 145 */ 146 vbase = (vaddr_t)phys_to_virt(pbase, mtype); 147 if (!vbase) { 148 if (!core_mmu_add_mapping(mtype, pbase, sz)) { 149 EMSG("Failed to map %zu bytes at PA 0x%"PRIxPA, 150 (size_t)sz, pbase); 151 return TEE_ERROR_GENERIC; 152 } 153 } 154 155 vbase = (vaddr_t)phys_to_virt(pbase, mtype); 156 if (!vbase) { 157 EMSG("Failed to get VA for PA 0x%"PRIxPA, pbase); 158 return TEE_ERROR_GENERIC; 159 } 160 161 *wdog_vbase = vbase; 162 163 return TEE_SUCCESS; 164 } 165 #else 166 register_phys_mem(MEM_AREA_IO_SEC, WDOG_BASE, CORE_MMU_DEVICE_SIZE); 167 static TEE_Result imx_wdog_base(vaddr_t *wdog_vbase) 168 { 169 *wdog_vbase = (vaddr_t)phys_to_virt(WDOG_BASE, MEM_AREA_IO_SEC); 170 #if defined(CFG_IMX_WDOG_EXT_RESET) 171 ext_reset = true; 172 #endif 173 return TEE_SUCCESS; 174 } 175 #endif 176 177 static TEE_Result imx_wdog_init(void) 178 { 179 #if defined(PLATFORM_FLAVOR_mx7dsabresd) || \ 180 defined(PLATFORM_FLAVOR_mx7dclsom) 181 182 ext_reset = true; 183 #endif 184 return imx_wdog_base(&wdog_base); 185 } 186 driver_init(imx_wdog_init); 187