xref: /optee_os/core/drivers/imx_snvs.c (revision 10b907910d58334cc5b1486cb2f91a08f764566e)
1 // SPDX-License-Identifier: BSD-2-Clause
2 /*
3  * Copyright (C) 2020 Pengutronix
4  * Rouven Czerwinski <entwicklung@pengutronix.de>
5  */
6 
7 #include <io.h>
8 #include <drivers/imx_snvs.h>
9 #include <mm/core_memprot.h>
10 #include <mm/core_mmu.h>
11 #include <stdint.h>
12 #include <types_ext.h>
13 #include <trace.h>
14 
15 enum snvs_security_cfg snvs_get_security_cfg(void)
16 {
17 	vaddr_t snvs = core_mmu_get_va(SNVS_BASE, MEM_AREA_IO_SEC);
18 	uint32_t val = 0;
19 
20 	val = io_read32(snvs + SNVS_HPSR);
21 	DMSG("HPSR: 0x%"PRIx32, val);
22 	if (val & SNVS_HPSR_SYS_SECURITY_BAD)
23 		return SNVS_SECURITY_CFG_FIELD_RETURN;
24 	else if (val & SNVS_HPSR_SYS_SECURITY_CLOSED)
25 		return SNVS_SECURITY_CFG_CLOSED;
26 	else if (val & SNVS_HPSR_SYS_SECURITY_OPEN)
27 		return SNVS_SECURITY_CFG_OPEN;
28 	else if (val > 4 && val < 8)
29 		return SNVS_SECURITY_CFG_OPEN;
30 
31 	return SNVS_SECURITY_CFG_FAB;
32 }
33 
34 enum snvs_ssm_mode snvs_get_ssm_mode(void)
35 {
36 	vaddr_t snvs = core_mmu_get_va(SNVS_BASE, MEM_AREA_IO_SEC);
37 	uint32_t val = 0;
38 
39 	val = io_read32(snvs + SNVS_HPSR);
40 	val &= HPSR_SSM_ST_MASK;
41 	val = val >> HPSR_SSM_ST_SHIFT;
42 	DMSG("HPSR: SSM ST Mode: 0x%01"PRIx32, val);
43 	return val;
44 }
45