xref: /optee_os/core/drivers/imx_scu.c (revision 9f34db38245c9b3a4e6e7e63eb78a75e23ab2da3)
1 // SPDX-License-Identifier: BSD-2-Clause
2 /*
3  * Copyright 2017-2019, 2023 NXP
4  *
5  */
6 
7 #include <imx.h>
8 #include <initcall.h>
9 #include <io.h>
10 #include <kernel/tz_ssvce_def.h>
11 #include <mm/core_memprot.h>
12 
13 /* Invalidate all registers */
14 #define	SCU_INV_CTRL_INIT	0xFFFFFFFF
15 /* Both secure CPU access SCU */
16 #define SCU_SAC_CTRL_INIT	0x0000000F
17 /* Both non-secure CPU access SCU, private and global timer */
18 #define SCU_NSAC_CTRL_INIT	0x00000FFF
19 
20 static TEE_Result scu_init(void)
21 {
22 	vaddr_t scu_base = core_mmu_get_va(SCU_BASE, MEM_AREA_IO_SEC,
23 					   SCU_SIZE);
24 
25 	if (!scu_base)
26 		return TEE_ERROR_GENERIC;
27 
28 	/* SCU config */
29 	io_write32(scu_base + SCU_INV_SEC, SCU_INV_CTRL_INIT);
30 	io_write32(scu_base + SCU_SAC, SCU_SAC_CTRL_INIT);
31 	io_write32(scu_base + SCU_NSAC, SCU_NSAC_CTRL_INIT);
32 
33 	/* SCU enable */
34 	io_write32(scu_base + SCU_CTRL, io_read32(scu_base + SCU_CTRL) | 0x1);
35 
36 	return TEE_SUCCESS;
37 }
38 driver_init(scu_init);
39